Searched refs:ITSTATE (Results 1 – 7 of 7) sorted by relevance
| /src/contrib/llvm-project/lldb/source/Plugins/Architecture/Arm/ |
| H A D | ArchitectureArm.cpp | 111 const uint32_t ITSTATE = Bits32(cpsr, 15, 10) << 2 | Bits32(cpsr, 26, 25); in OverrideStopInfo() local 112 if (ITSTATE != 0) { in OverrideStopInfo() 113 const uint32_t condition = Bits32(ITSTATE, 7, 4); in OverrideStopInfo()
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| /src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2ITBlockPass.cpp | 91 if (!Reg || Reg == ARM::ITSTATE || Reg == ARM::SP) in INITIALIZE_PASS() 217 MI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/, in InsertITInstructions() 247 NMI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/, in InsertITInstructions() 272 LastITMI->findRegisterUseOperand(ARM::ITSTATE, /*TRI=*/nullptr) in InsertITInstructions()
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| H A D | ARMLowOverheadLoops.cpp | 550 RDA.getReachingLocalUses(&IT, MCRegister::from(ARM::ITSTATE), in INITIALIZE_PASS() 561 Dead->findRegisterUseOperand(ARM::ITSTATE, /*TRI=*/nullptr)) { in INITIALIZE_PASS()
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| H A D | ARMRegisterInfo.td | 192 def ITSTATE : ARMReg<4, "itstate">;
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| H A D | ARMBaseInstrInfo.cpp | 6415 if (MI.readsRegister(ARM::ITSTATE, TRI) || in getOutliningTypeImpl() 6416 MI.modifiesRegister(ARM::ITSTATE, TRI)) in getOutliningTypeImpl()
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| H A D | ARMInstrThumb2.td | 4041 let Defs = [ITSTATE] in
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| /src/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.cpp | 2784 ITSTATE.IT<7:0> = firstcond:mask; in EmulateIT()
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