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/src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVOPDInstructions.td58 class GFXGenD<GFXGen Gen, list<string> DXPseudos, list<string> DYPseudos,
59 Predicate subtargetPred = Gen.AssemblerPredicate> :
60 GFXGen<Gen.AssemblerPredicate, Gen.DecoderNamespace, Gen.Suffix,
61 Gen.Subtarget> {
68 VOPD_Component XasVC, VOPD_Component YasVC, GFXGenD Gen>
71 SIMCInstr<NAME, Gen.Subtarget> {
76 bits<4> SubTgt = Gen.Subtarget;
80 let DecoderNamespace = Gen.DecoderNamespace;
81 let AssemblerPredicate = Gen.AssemblerPredicate;
84 let SubtargetPredicate = Gen.SubtargetPredicate;
[all …]
H A DVOPInstructions.td201 class VOP3_Real_Gen <VOP_Pseudo ps, GFXGen Gen, string asm_name = ps.Mnemonic> :
202 VOP3_Real <ps, Gen.Subtarget, asm_name> {
203 let AssemblerPredicate = Gen.AssemblerPredicate;
205 let DecoderNamespace = Gen.DecoderNamespace#
218 class VOP3P_Real_Gen<VOP_Pseudo ps, GFXGen Gen, string asm_name = ps.Mnemonic> :
219 VOP3P_Real<ps, Gen.Subtarget, asm_name> {
220 let AssemblerPredicate = Gen.AssemblerPredicate;
221 let DecoderNamespace = Gen.DecoderNamespace;
1352 class VOP3_DPP16_Gen<bits<10> op, VOP_DPP_Pseudo ps, GFXGen Gen,
1354 VOP3_DPP16 <op, ps, Gen.Subtarget, opName> {
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H A DVOP2Instructions.td112 class VOP2_Real_Gen <VOP2_Pseudo ps, GFXGen Gen, string real_name = ps.Mnemonic> :
113 VOP2_Real <ps, Gen.Subtarget, real_name> {
114 let AssemblerPredicate = Gen.AssemblerPredicate;
116 let DecoderNamespace = Gen.DecoderNamespace#
1292 class VOP2_DPP16_Gen<bits<6> op, VOP2_DPP_Pseudo ps, GFXGen Gen,
1294 VOP2_DPP16<op, ps, Gen.Subtarget, opName, p> {
1295 let AssemblerPredicate = Gen.AssemblerPredicate;
1297 let DecoderNamespace = Gen.DecoderNamespace#
1322 class VOP2_DPP8_Gen<bits<6> op, VOP2_Pseudo ps, GFXGen Gen,
1325 let AssemblerPredicate = Gen.AssemblerPredicate;
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H A DVOP1Instructions.td93 class VOP1_Real_Gen <VOP1_Pseudo ps, GFXGen Gen, string real_name = ps.Mnemonic> :
94 VOP1_Real <ps, Gen.Subtarget, real_name> {
95 let AssemblerPredicate = Gen.AssemblerPredicate;
96 let DecoderNamespace = Gen.DecoderNamespace;
778 class VOP1_DPP16_Gen<bits<8> op, VOP1_DPP_Pseudo ps, GFXGen Gen, VOPProfile p = ps.Pfl> :
779 VOP1_DPP16 <op, ps, Gen.Subtarget, p> {
780 let AssemblerPredicate = Gen.AssemblerPredicate;
781 let DecoderNamespace = Gen.DecoderNamespace;
800 class VOP1_DPP8_Gen<bits<8> op, VOP1_Pseudo ps, GFXGen Gen, VOPProfile p = ps.Pfl> :
802 let AssemblerPredicate = Gen.AssemblerPredicate;
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H A DVOPCInstructions.td1339 multiclass VOPC_Real_Base<GFXGen Gen, bits<9> op> {
1340 let AssemblerPredicate = Gen.AssemblerPredicate, DecoderNamespace = Gen.DecoderNamespace in {
1343 def _e32#Gen.Suffix : VOPC_Real<ps32, Gen.Subtarget>,
1345 def _e64#Gen.Suffix : VOP3_Real<ps64, Gen.Subtarget>,
1353 defm : VOPCInstAliases<NAME, !substr(Gen.Suffix,1)>;
1358 def _e32_dpp#Gen.Suffix : VOPC_DPP16_SIMC<op{7-0}, psDPP, Gen.Subtarget>;
1359 def _e32_dpp_w32#Gen.Suffix : VOPC_DPP16<op{7-0}, psDPP> {
1364 def _e32_dpp_w64#Gen.Suffix : VOPC_DPP16<op{7-0}, psDPP> {
1370 def _e32_dpp8#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32>;
1371 def _e32_dpp8_w32#Gen.Suffix : VOPC_DPP8<op{7-0}, ps32> {
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H A DR600Subtarget.h41 Generation Gen = R600; variable
76 return Gen; in getGeneration()
H A DVOP3PInstructions.td1382 multiclass VOP3P_Real_Base<GFXGen Gen, bits<7> op, string backing_ps_name = NAME,
1384 def Gen.Suffix :
1385 VOP3P_Real_Gen<!cast<VOP3P_Pseudo>(backing_ps_name), Gen, asmName>,
1413 multiclass VOP3P_WMMA_Real_Base<GFXGen Gen, bits<7> op, VOP3PWMMA_Profile WMMAP,
1416 def Gen.Suffix :
1417 VOP3P_Real_Gen<!cast<VOP3P_Pseudo>(backing_ps_name), Gen, asmName>,
1482 multiclass VOP3P_Real_with_name<GFXGen Gen, bits<7> op,
1487 def Gen.Suffix :
1488 VOP3P_Real_Gen<!cast<VOP3P_Pseudo>(backing_ps_name), Gen, asmName>,
1492 let AssemblerPredicate = Gen.AssemblerPredicate;
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H A DAMDGPUFeatures.td45 SubtargetFeature <FeatureName, "Gen", Subtarget#"::"#Value,
/src/contrib/llvm-project/clang/lib/CodeGen/
H A DMacroPPCallbacks.cpp61 MacroPPCallbacks::MacroPPCallbacks(CodeGenerator *Gen, Preprocessor &PP) in MacroPPCallbacks() argument
62 : Gen(Gen), PP(PP), Status(NoScope) {} in MacroPPCallbacks()
131 Scopes.push_back(Gen->getCGDebugInfo()->CreateTempMacroFile(getCurrentScope(), in FileEntered()
186 Gen->getCGDebugInfo()->CreateMacro(getCurrentScope(), in MacroDefined()
196 Gen->getCGDebugInfo()->CreateMacro(getCurrentScope(), in MacroUndefined()
H A DCodeGenAction.cpp125 Gen(CreateLLVMCodeGen(Diags, InFile, std::move(VFS), HeaderSearchOpts, in BackendConsumer()
149 Gen(CreateLLVMCodeGen(Diags, "", std::move(VFS), HeaderSearchOpts, PPOpts, in BackendConsumer()
158 return Gen->GetModule(); in getModule()
162 return std::unique_ptr<llvm::Module>(Gen->ReleaseModule()); in takeModule()
166 return Gen.get(); in getCodeGenerator()
170 Gen->HandleCXXStaticMemberVarInstantiation(VD); in HandleCXXStaticMemberVarInstantiation()
181 Gen->Initialize(Ctx); in Initialize()
199 Gen->HandleTopLevelDecl(D); in HandleTopLevelDecl()
217 Gen->HandleInlineFunctionDefinition(D); in HandleInlineFunctionDefinition()
276 Gen->HandleTranslationUnit(C); in HandleTranslationUnit()
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H A DMacroPPCallbacks.h28 CodeGenerator *Gen; variable
90 MacroPPCallbacks(CodeGenerator *Gen, Preprocessor &PP);
H A DCGNonTrivialStruct.cpp812 GenDefaultInitialize Gen(getContext()); in defaultInitNonTrivialCStructVar() local
814 Gen.setCGF(this); in defaultInitNonTrivialCStructVar()
817 Gen.visit(QT, nullptr, CharUnits::Zero(), std::array<Address, 1>({{DstPtr}})); in defaultInitNonTrivialCStructVar()
821 static void callSpecialFunction(G &&Gen, StringRef FuncName, QualType QT, in callSpecialFunction() argument
828 Gen.callFunc(FuncName, QT, Addrs, CGF); in callSpecialFunction()
833 getSpecialFunction(G &&Gen, StringRef FuncName, QualType QT, bool IsVolatile, in getSpecialFunction() argument
839 return Gen.getFunction(FuncName, QT, Alignments, CGM); in getSpecialFunction()
/src/contrib/llvm-project/llvm/include/llvm/FuzzMutate/
H A DRandom.h21 template <typename T, typename GenT> T uniform(GenT &Gen, T Min, T Max) { in uniform() argument
22 return std::uniform_int_distribution<T>(Min, Max)(Gen); in uniform()
26 template <typename T, typename GenT> T uniform(GenT &Gen) { in uniform() argument
27 return uniform<T>(Gen, std::numeric_limits<T>::min(), in uniform()
/src/contrib/googletest/googletest/include/gtest/
H A Dgtest-param-test.h481 template <typename T, int&... ExplicitArgumentBarrier, typename Gen,
484 internal::ParamConverterGenerator<T, StdFunction> ConvertGenerator(Gen&& gen, in ConvertGenerator()
487 std::forward<Gen>(gen), std::forward<Func>(f)); in ConvertGenerator()
492 template <int&... ExplicitArgumentBarrier, typename Gen, typename Func,
494 auto ConvertGenerator(Gen&& gen, Func&& f) { in ConvertGenerator()
500 std::forward<Gen>(gen), std::forward<Func>(f)); in ConvertGenerator()
/src/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8173-elm-hana.dtsi21 * Lenovo 100e Chromebook 2nd Gen (MTK) and Lenovo 300e Chromebook 2nd
22 * Gen (MTK) are using synaptics touchscreen (hid-over-i2c driver) as a
46 * Lenovo 100e Chromebook 2nd Gen (MTK) and Lenovo 300e Chromebook 2nd
47 * Gen (MTK) are using synaptics trackpad (hid-over-i2c driver) as a
/src/contrib/llvm-project/clang/lib/Serialization/
H A DMultiOnDiskHashTable.h298 Generator Gen; variable
301 MultiOnDiskHashTableGenerator() : Gen() {} in MultiOnDiskHashTableGenerator()
305 Gen.insert(Key, Data, Info); in insert()
329 if (!Gen.contains(KV.first, Info)) in emit()
330 Gen.insert(KV.first, Info.ImportData(KV.second), Info); in emit()
338 uint32_t BucketOffset = Gen.Emit(OutStream, Info); in emit()
/src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am642-hummingboard-t-usb3.dts6 * running on Cortex A53, with USB-3.1 Gen 1.
15 model = "SolidRun AM642 HummingBoard-T with USB-3.1 Gen 1";
/src/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp153c-lxa-fairytux2-gen1.dts11 model = "Linux Automation GmbH FairyTux 2 Gen 1";
94 * On Gen 1 FairyTux 2 only RTS can be used and not CTS as well,
H A Dstm32mp153c-lxa-fairytux2-gen2.dts11 model = "Linux Automation GmbH FairyTux 2 Gen 2";
/src/sys/arm64/conf/
H A Dstd.hyperv2 # Hyper-V support (Hyper-v Gen 2)
H A Dstd.nxp25 device dpaa2 # Data Path Acceleration Architecture (2nd Gen)
/src/sys/contrib/device-tree/src/arm64/qcom/
H A Dx1e78100-lenovo-thinkpad-t14s-oled.dts9 model = "Lenovo ThinkPad T14s Gen 6 (OLED)";
H A Dx1e78100-lenovo-thinkpad-t14s.dts9 model = "Lenovo ThinkPad T14s Gen 6 (LCD)";
/src/contrib/llvm-project/llvm/utils/TableGen/
H A DDAGISelMatcherGen.cpp1079 MatcherGen Gen(Pattern, CGP); in ConvertPatternToMatcher() local
1082 if (Gen.EmitMatcherCode(Variant)) in ConvertPatternToMatcher()
1091 Gen.EmitResultCode(); in ConvertPatternToMatcher()
1094 return Gen.GetMatcher(); in ConvertPatternToMatcher()
/src/contrib/llvm-project/clang/include/clang/Tooling/Transformer/
H A DRewriteRule.h246 [Gen = std::move(Metadata)]( in withMetadata()
248 return Gen(R); in withMetadata()

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