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Searched refs:FPR (Results 1 – 25 of 44) sorted by relevance

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/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def16 // 0: FPR 16-bit value.
18 // 1: FPR 32-bit value.
20 // 2: FPR 64-bit value.
22 // 3: FPR 128-bit value.
24 // 4: FPR 256-bit value.
26 // 5: FPR 512-bit value.
43 // 1: FPR 16-bit value. <-- This must match First3OpsIdx.
47 // 4: FPR 32-bit value. <-- This must match First3OpsIdx.
51 // 7: FPR 64-bit value.
55 // 10: FPR 128-bit value.
[all …]
H A DAArch64RegisterBanks.td16 def FPRRegBank : RegisterBank<"FPR", [QQQQ, ZPR]>;
/src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp135 CHECK_VALUEMAP(FPR, 16); in AArch64RegisterBankInfo()
136 CHECK_VALUEMAP(FPR, 32); in AArch64RegisterBankInfo()
137 CHECK_VALUEMAP(FPR, 64); in AArch64RegisterBankInfo()
138 CHECK_VALUEMAP(FPR, 128); in AArch64RegisterBankInfo()
139 CHECK_VALUEMAP(FPR, 256); in AArch64RegisterBankInfo()
140 CHECK_VALUEMAP(FPR, 512); in AArch64RegisterBankInfo()
154 CHECK_VALUEMAP_3OPS(FPR, 32); in AArch64RegisterBankInfo()
155 CHECK_VALUEMAP_3OPS(FPR, 64); in AArch64RegisterBankInfo()
156 CHECK_VALUEMAP_3OPS(FPR, 128); in AArch64RegisterBankInfo()
157 CHECK_VALUEMAP_3OPS(FPR, 256); in AArch64RegisterBankInfo()
[all …]
/src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCGenRegisterBankInfo.def21 // 2: FPR 32-bit value
23 // 3: FPR 64-bit value
54 // 7: FPR 32-bit value.
58 // 10: FPR 64-bit value.
83 PMI_FPR64, // FPR
H A DPPCRegisterInfo.td59 // FPR - One of the 32 64-bit floating-point registers
60 class FPR<bits<5> num, string n> : PPCReg<n> {
68 let SubRegs = [!cast<FPR>("F"#EvenIndex), !cast<FPR>("F"#!add(EvenIndex, 1))];
90 class VSRL<FPR SubReg, FPR SubRegH, string n> : PPCReg<n> {
155 def F#Index : FPR<Index, "f"#Index>,
165 def FH#Index : FPR<-1, "">;
197 def VSL#Index : VSRL<!cast<FPR>("F"#Index), !cast<FPR>("FH"#Index), "vs"#Index>,
198 DwarfRegAlias<!cast<FPR>("F"#Index)>;
/src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZMachineFunctionInfo.h87 void setVarArgsFirstFPR(Register FPR) { VarArgsFirstFPR = FPR; } in setVarArgsFirstFPR() argument
/src/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfoPOSIX_riscv64.cpp23 sizeof(RegisterInfoPOSIX_riscv64::FPR))
115 return sizeof(struct RegisterInfoPOSIX_riscv64::FPR); in GetFPRSize()
H A DRegisterInfoPOSIX_loongarch64.cpp25 sizeof(RegisterInfoPOSIX_loongarch64::FPR))
131 return sizeof(struct RegisterInfoPOSIX_loongarch64::FPR); in GetFPRSize()
H A DRegisterInfos_ppc64le.h15 #define FPR_OFFSET(regname) (offsetof(FPR, regname) + sizeof(GPR))
16 #define VMX_OFFSET(regname) (offsetof(VMX, regname) + sizeof(GPR) + sizeof(FPR))
18 (offsetof(VSX, regname) + sizeof(GPR) + sizeof(FPR) + sizeof(VMX))
353 } FPR; typedef
H A DRegisterInfoPOSIX_riscv64.h33 struct FPR { struct
H A DRegisterInfos_i386.h28 LLVM_EXTENSION offsetof(FPR, fxsave) + \
34 LLVM_EXTENSION offsetof(FPR, xsave) + \
39 LLVM_EXTENSION offsetof(FPR, xsave) + \
H A DRegisterContextPOSIX_riscv64.h53 size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_riscv64::FPR); } in GetFPRSize()
H A DRegisterContextPOSIX_loongarch64.h53 size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_loongarch64::FPR); } in GetFPRSize()
H A DRegisterInfoPOSIX_loongarch64.h40 struct FPR { struct
H A DRegisterContextOpenBSD_x86_64.cpp55 FPR fpr;
H A DRegisterInfos_powerpc.h13 #define FPR_OFFSET(regname) (sizeof(GPR) + offsetof(FPR, regname))
14 #define VMX_OFFSET(regname) (sizeof(GPR) + sizeof(FPR) + offsetof(VMX, regname))
H A DRegisterInfos_x86_64.h18 LLVM_EXTENSION offsetof(FPR, fxsave) + \
25 LLVM_EXTENSION offsetof(FPR, xsave) + \
33 LLVM_EXTENSION offsetof(FPR, xsave) + \
38 LLVM_EXTENSION offsetof(FPR, xsave) + \
H A DRegisterInfos_x86_64_with_base.h20 LLVM_EXTENSION offsetof(FPR, fxsave) + \
27 LLVM_EXTENSION offsetof(FPR, xsave) + \
35 LLVM_EXTENSION offsetof(FPR, xsave) + \
40 LLVM_EXTENSION offsetof(FPR, xsave) + \
H A DRegisterContextFreeBSD_x86_64.cpp59 FPR fpr;
H A DRegisterContextNetBSD_x86_64.cpp72 FPR fpr;
H A DRegisterContextPOSIX_x86.h155 lldb_private::FPR m_fpr; // floating-point registers including extended
/src/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBanks.td17 def FPRRegBank : RegisterBank<"FPR", [VSSRC]>;
/src/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.td50 class FPR<bits<16> Enc, string n> : MipsReg<Enc, n>;
158 def F#I : FPR<I, "f"#I>, DwarfRegNum<[!add(I, 32)]>;
162 def F_HI#I : FPR<I, "f"#I>, DwarfRegNum<[!add(I, 32)]>;
168 [!cast<FPR>("F"#!shl(I, 1)),
169 !cast<FPR>("F"#!add(!shl(I, 1), 1))]>;
173 def D#I#_64 : AFPR64<I, "f"#I, [!cast<FPR>("F"#I), !cast<FPR>("F_HI"#I)]>,
/src/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFloat32InstrInfo.td316 // GPR -> FPR
318 // FPR -> GPR
335 // GPR -> FPR
337 // FPR -> GPR
/src/contrib/llvm-project/lldb/source/Plugins/Process/minidump/
H A DRegisterContextMinidump_x86_64.h133 union FPR { union

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