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Searched refs:Defines (Results 1 – 25 of 94) sorted by relevance

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/src/sys/contrib/device-tree/Bindings/ata/
H A Dnvidia,tegra124-ahci.txt11 - interrupts : Defines the interrupt used by SATA
29 - hvdd-supply : Defines the SATA HVDD regulator
30 - vddio-supply : Defines the SATA VDDIO regulator
31 - avdd-supply : Defines the SATA AVDD regulator
32 - target-5v-supply : Defines the SATA 5V power regulator
33 - target-12v-supply : Defines the SATA 12V power regulator
/src/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSSAUpdaterBulk.cpp56 Rewrites[Var].Defines[BB] = V; in AddAvailableValue()
72 if (!R.Defines.count(BB)) { in computeValueAt()
76 R.Defines[BB] = V; in computeValueAt()
78 R.Defines[BB] = UndefValue::get(R.Ty); in computeValueAt()
80 return R.Defines[BB]; in computeValueAt()
135 for (auto &Def : R.Defines) in RewriteAllUses()
155 R.Defines[FrontierBB] = PN; in RewriteAllUses()
/src/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dmvebu-devbus.txt37 - devbus,turn-off-ps: Defines the time during which the controller does not
43 - devbus,bus-width: Defines the bus width, in bits (e.g. <16>).
46 - devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
52 - devbus,acc-first-ps: Defines the time delay from the negation of
57 - devbus,acc-next-ps: Defines the time delay between the cycle that
62 - devbus,rd-setup-ps: Defines the time delay between DEV_CSn assertion to
71 - devbus,rd-hold-ps: Defines the time between the last data sample to the
85 - devbus,ale-wr-ps: Defines the time delay from the ALE[0] negation cycle
89 - devbus,wr-low-ps: Defines the time during which DEV_WEn is active.
95 - devbus,wr-high-ps: Defines the time during which DEV_WEn is kept
/src/contrib/llvm-project/compiler-rt/lib/scudo/standalone/
H A Dallocator_config.def43 // Defines the type of Primary allocator to use.
46 // Defines the type of Secondary allocator to use.
75 // Defines the minimal & maximal release interval that can be set.
102 // Defines the type and scale of a compact pointer. A compact pointer can
109 // Defines the type of Secondary Cache to use.
114 // Defines the type of cache used by the Secondary. Some additional
/src/sys/contrib/device-tree/Bindings/sound/
H A Dfsl,asrc.txt39 - fsl,asrc-rate : Defines a mutual sample rate used by DPCM Back Ends.
41 - fsl,asrc-width : Defines a mutual sample width used by DPCM Back Ends.
43 - fsl,asrc-clk-map : Defines clock map used in driver. which is required
54 - fsl,asrc-format : Defines a mutual sample format used by DPCM Back
/src/sys/contrib/device-tree/Bindings/devfreq/
H A Drk3399_dmc.txt34 - rockchip,pd_idle : Configure the PD_IDLE value. Defines the
39 - rockchip,sr_idle : Configure the SR_IDLE value. Defines the
46 - rockchip,sr_mc_gate_idle : Defines the memory self-refresh and controller
52 - rockchip,srpd_lite_idle : Defines the self-refresh power down idle
58 - rockchip,standby_idle : Defines the standby idle period in which
64 - rockchip,dram_dll_dis_freq : Defines the DDR3 DLL bypass frequency in MHz.
69 - rockchip,phy_dll_dis_freq : Defines the PHY dll bypass frequency in
/src/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DTarget.td29 // Defines a matcher for complex operands. This is analogous to ComplexPattern
51 // Defines a custom renderer. This is analogous to SDNodeXForm from
/src/sys/contrib/device-tree/Bindings/crypto/
H A Dfsl-sec4.txt68 Definition: A standard property. Defines the number of cells
74 Definition: A standard property. Defines the number of cells
208 Child node of the crypto node. Defines a register space that
224 Definition: A standard property. Defines the number of cells
231 Definition: A standard property. Defines the number of cells
332 Definition: A standard property. Defines the number of cells
339 Definition: A standard property. Defines the number of cells
H A Dfsl-sec6.txt34 Definition: A standard property. Defines the number of cells
40 Definition: A standard property. Defines the number of cells
/src/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DSSAUpdaterBulk.h41 DenseMap<BasicBlock *, Value *> Defines; member
/src/sys/contrib/device-tree/Bindings/thermal/
H A Dhisilicon-thermal.txt8 - interrupt: The interrupt number to the cpu. Defines the interrupt used
/src/contrib/googletest/docs/reference/
H A Dactions.md112 | `ACTION(Sum) { return arg0 + arg1; }` | Defines an action `Sum()` to return the sum of the mock f…
113 | `ACTION_P(Plus, n) { return arg0 + n; }` | Defines an action `Plus(n)` to return the sum of the m…
114 | `ACTION_Pk(Foo, p1, ..., pk) { statements; }` | Defines a parameterized action `Foo(p1, ..., pk)`…
/src/sys/contrib/device-tree/Bindings/reset/
H A Dlantiq,reset.txt14 - reg : Defines the following sets of registers in the parent
/src/sys/contrib/device-tree/Bindings/leds/
H A Dleds-lm3532.txt55 - ti,led-mode : Defines if the LED strings are manually controlled or
65 - led-max-microamp : Defines the full scale current value for each control
/src/contrib/googletest/googletest/cmake/
H A Dinternal_utils.cmake1 # Defines functions and macros useful for building Google Test and
57 # Defines the compiler/linker flags used to build Google Test and
65 # Defines CMAKE_USE_PTHREADS_INIT and CMAKE_THREAD_LIBS_INIT.
160 # Defines the gtest & gtest_main libraries. User tests should link
/src/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra20-usb-phy.txt10 - reg : Defines the following set of registers, in the order listed:
16 - clocks : Defines the clocks listed in the clock-names property.
H A Dphy-lantiq-rcu-usb2.txt17 - reg : Defines the following sets of registers in the parent
H A Dphy-armada38x-comphy.txt27 - #phy-cells : from the generic phy bindings, must be 1. Defines the
H A Dnvidia,tegra124-xusb-padctl.txt133 - status: Defines the operation status of the PHY. Valid values are:
179 - status: Defines the operation status of the port. Valid values are:
204 - status: Defines the operation status of the port. Valid values are:
216 - status: Defines the operation status of the port. Valid values are:
227 - status: Defines the operation status of the port. Valid values are:
/src/sys/contrib/device-tree/Bindings/gpio/
H A Dabilis,tb10x-gpio.txt15 - interrupts: Defines the interrupt line connecting this GPIO controller to
/src/contrib/llvm-project/lldb/include/lldb/Target/
H A DAppleArm64ExceptionClass.def9 // Defines ESR exception classes for Apple arm64* targets.
/src/contrib/pam-krb5/m4/
H A Dkrb5-pkinit.m437 dnl (0.8 release candidates and later) or only nine (0.7). Defines
/src/sys/contrib/device-tree/Bindings/input/rmi4/
H A Drmi_f01.txt17 - syna,wakeup-threshold: Defines the amplitude of the disturbance to the
/src/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsDirectX.td1 //===- IntrinsicsDirectX.td - Defines DirectX intrinsics ---*- tablegen -*-===//
/src/contrib/kyua/m4/
H A Dgetopt.m435 dnl Defines HAVE_GETOPT_GNU if a + sign is supported.
87 dnl Defines HAVE_GETOPT_WITH_OPTRESET if optreset exists.

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