Searched refs:DBG_REG_BASE_WVR (Results 1 – 2 of 2) sorted by relevance
| /src/sys/arm64/arm64/ |
| H A D | debug_monitor.c | 98 #define DBG_REG_BASE_WVR (DBG_REG_BASE_BCR + 16) macro
99 #define DBG_REG_BASE_WCR (DBG_REG_BASE_WVR + 16)
168 SWITCH_CASES_READ_WB_REG(DBG_WB_WVR, DBG_REG_BASE_WVR, val); in dbg_wb_read_reg()
184 SWITCH_CASES_WRITE_WB_REG(DBG_WB_WVR, DBG_REG_BASE_WVR, val); in dbg_wb_write_reg()
371 addr = dbg_wb_read_reg(DBG_REG_BASE_WVR, i); in dbg_show_watchpoint()
613 dbg_wb_write_reg(DBG_REG_BASE_WVR, i, in dbg_register_sync()
656 dbg_wb_write_reg(DBG_REG_BASE_WVR, i, 0); in dbg_monitor_init()
679 dbg_wb_write_reg(DBG_REG_BASE_WVR, i, 0); in dbg_monitor_enter()
712 dbg_wb_write_reg(DBG_REG_BASE_WVR, i, 0); in dbg_monitor_exit()
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| /src/sys/arm/arm/ |
| H A D | debug_monitor.c | 150 #define DBG_REG_BASE_WVR (DBG_WB_WVR << OP2_SHIFT) macro
318 wvr = dbg_wb_read_reg(DBG_REG_BASE_WVR, i); in kdb_cpu_clear_singlestep()
476 addr = dbg_wb_read_reg(DBG_REG_BASE_WVR, i) & DBGWVR_ADDR_MASK; in dbg_show_watchpoint()
502 vr = DBG_REG_BASE_WVR; in dbg_check_slot_free()
561 reg_addr = DBG_REG_BASE_WVR; in dbg_find_slot()
700 reg_addr = DBG_REG_BASE_WVR; in dbg_setup_xpoint()
759 reg_addr = DBG_REG_BASE_WVR; in dbg_remove_xpoint()
919 dbg_wb_write_reg(DBG_REG_BASE_WVR, i, 0); in dbg_reset_state()
1033 dbg_wb_write_reg(DBG_REG_BASE_WVR, i, d->dbg_wvr[i]); in dbg_resume_dbreg()
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