Searched refs:DBG_REG_BASE_BCR (Results 1 – 2 of 2) sorted by relevance
| /src/sys/arm64/arm64/ |
| H A D | debug_monitor.c | 97 #define DBG_REG_BASE_BCR (DBG_REG_BASE_BVR + 16) macro
98 #define DBG_REG_BASE_WVR (DBG_REG_BASE_BCR + 16)
171 SWITCH_CASES_READ_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val); in dbg_wb_read_reg()
187 SWITCH_CASES_WRITE_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val); in dbg_wb_write_reg()
307 bcr = dbg_wb_read_reg(DBG_REG_BASE_BCR, i); in dbg_show_breakpoint()
604 dbg_wb_write_reg(DBG_REG_BASE_BCR, i, in dbg_register_sync()
660 dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0); in dbg_monitor_init()
683 dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0); in dbg_monitor_enter()
716 dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0); in dbg_monitor_exit()
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| /src/sys/arm/arm/ |
| H A D | debug_monitor.c | 149 #define DBG_REG_BASE_BCR (DBG_WB_BCR << OP2_SHIFT) macro
496 cr = DBG_REG_BASE_BCR; in dbg_check_slot_free()
557 reg_ctrl = DBG_REG_BASE_BCR; in dbg_find_slot()
678 reg_ctrl = DBG_REG_BASE_BCR; in dbg_setup_xpoint()
750 reg_ctrl = DBG_REG_BASE_BCR; in dbg_remove_xpoint()
923 dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0); in dbg_reset_state()
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