| /src/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-8040-mcbin.dtsi | 78 /* CON17,18 - CPS lane 4 */ 91 /* CON13,14 - CPS lane 5 */ 292 /* CPS Lane 0 - J5 (Gigabit RJ45) */ 302 /* CPS Lane 5 */ 345 /* CPS Lane 1 - U32 */ 351 /* CPS Lane 3 - U31 */ 382 /* CPS Lane 2 - CON7 */
|
| /src/contrib/llvm-project/compiler-rt/lib/orc/ |
| H A D | coff_platform.cpp | 98 static bool isInitialized() { return CPS; } in isInitialized() 151 static COFFPlatformRuntimeState *CPS; member in __anon5e3e244d0111::COFFPlatformRuntimeState 166 COFFPlatformRuntimeState *COFFPlatformRuntimeState::CPS = nullptr; member in COFFPlatformRuntimeState 571 assert(!CPS && "COFFPlatformRuntimeState should be null"); in initialize() 572 CPS = new COFFPlatformRuntimeState(); in initialize() 576 assert(CPS && "COFFPlatformRuntimeState not initialized"); in get() 577 return *CPS; in get() 581 assert(CPS && "COFFPlatformRuntimeState not initialized"); in destroy() 582 delete CPS; in destroy()
|
| /src/sys/contrib/device-tree/Bindings/mips/img/ |
| H A D | pistachio.txt | 14 be probed via CPS, it is not necessary to specify secondary CPUs. Required
|
| /src/secure/caroot/trusted/ |
| H A D | Entrust_Root_Certification_Authority.pem | 19 …Issuer: C = US, O = "Entrust, Inc.", OU = www.entrust.net/CPS is incorporated by reference, OU = "… 23 …Subject: C = US, O = "Entrust, Inc.", OU = www.entrust.net/CPS is incorporated by reference, OU = …
|
| H A D | Certigna_Root_CA.pem | 76 CPS: https://wwww.certigna.fr/autorites/
|
| H A D | AC_RAIZ_FNMT-RCM.pem | 74 CPS: http://www.cert.fnmt.es/dpcs/
|
| H A D | SwissSign_Gold_CA_-_G2.pem | 76 CPS: http://repository.swisssign.com/
|
| H A D | Autoridad_de_Certificacion_Firmaprofesional_CIF_A62634068.pem | 71 CPS: http://www.firmaprofesional.com/cps
|
| H A D | ACCVRAIZ1.pem | 78 CPS: http://www.accv.es/legislacion_c.htm
|
| H A D | QuoVadis_Root_CA_3.pem | 71 CPS: http://www.quovadisglobal.com/cps
|
| /src/sys/contrib/device-tree/Bindings/openrisc/opencores/ |
| H A D | or1ksim.txt | 19 be probed via CPS, it is not necessary to specify secondary CPUs. Required
|
| /src/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sm8650-mtp.dts | 761 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS) 784 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
|
| H A D | sm8750-qrd.dts | 940 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS) 963 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
|
| H A D | sm8650-qrd.dts | 1096 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS) 1119 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
|
| H A D | sm8650-hdk.dts | 1144 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS) 1167 * WSA8845 Port 6 (CPS) <=> SWR0 Port 13 (CPS)
|
| /src/contrib/llvm-project/llvm/lib/ExecutionEngine/ |
| H A D | ExecutionEngine.cpp | 1185 if (const ConstantStruct *CPS = dyn_cast<ConstantStruct>(Init)) { in InitializeMemory() local 1187 getDataLayout().getStructLayout(cast<StructType>(CPS->getType())); in InitializeMemory() 1188 for (unsigned i = 0, e = CPS->getNumOperands(); i != e; ++i) in InitializeMemory() 1189 InitializeMemory(CPS->getOperand(i), (char*)Addr+SL->getElementOffset(i)); in InitializeMemory()
|
| /src/secure/caroot/untrusted/ |
| H A D | Camerfirma_Chambers_of_Commerce_Root.pem | 63 CPS: http://cps.chambersign.org/cps/chambersroot.html
|
| H A D | Camerfirma_Global_Chambersign_Root.pem | 63 CPS: http://cps.chambersign.org/cps/chambersignroot.html
|
| H A D | EC-ACC.pem | 57 CPS: https://www.catcert.net/verarrel
|
| H A D | SwissSign_Platinum_CA_-_G2.pem | 73 CPS: http://repository.swisssign.com/
|
| H A D | SwissSign_Silver_CA_-_G2.pem | 75 CPS: http://repository.swisssign.com/
|
| H A D | LuxTrust_Global_Root_2.pem | 69 CPS: https://repository.luxtrust.lu
|
| H A D | Global_Chambersign_Root_-_2008.pem | 76 CPS: http://policy.camerfirma.com
|
| H A D | Chambers_of_Commerce_Root_-_2008.pem | 76 CPS: http://policy.camerfirma.com
|
| /src/crypto/openssl/doc/man5/ |
| H A D | x509v3_config.pod | 441 CPS.nnn = value 464 CPS.1 = "http://my.host.example.com/" 465 CPS.2 = "http://my.your.example.com/"
|