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Searched refs:CONST32 (Results 1 – 13 of 13) sorted by relevance

/src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitConst32AndConst64.cpp76 if (Opc == Hexagon::CONST32) { in runOnMachineFunction()
H A DHexagonGenMemAbsolute.cpp97 if (Opc != Hexagon::CONST32 && Opc != Hexagon::A2_tfrsi) in runOnMachineFunction()
H A DHexagonPseudo.td65 def CONST32 : CONSTLDInst<(outs IntRegs:$Rd), (ins i32imm:$v),
66 "$Rd = CONST32(#$v)", []>;
H A DHexagonBitTracker.cpp209 case CONST32: in evaluate()
321 case CONST32: in evaluate()
H A DHexagonISelLowering.cpp1250 return DAG.getNode(HexagonISD::CONST32, dl, PtrVT, GA); in LowerGLOBALADDRESS()
1348 SDValue Sym = DAG.getNode(HexagonISD::CONST32, dl, PtrVT, TGA); in LowerToTLSInitialExecModel()
1384 SDValue Sym = DAG.getNode(HexagonISD::CONST32, dl, PtrVT, TGA); in LowerToTLSLocalExecModel()
1409 SDValue Sym = DAG.getNode(HexagonISD::CONST32, dl, PtrVT, TGA); in LowerToTLSGeneralDynamicModel()
1919 case HexagonISD::CONST32: return "HexagonISD::CONST32"; in getTargetNodeName()
H A DHexagonAsmPrinter.cpp346 case Hexagon::CONST32: in HexagonProcessInstruction()
H A DHexagonISelLowering.h37 CONST32 = OP_BEGIN, enumerator
H A DHexagonISelDAGToDAG.cpp1550 if (!UseGP && GAOpc != HexagonISD::CONST32) in SelectGlobalAddress()
1569 case HexagonISD::CONST32: in SelectGlobalAddress()
2019 return V.getOpcode() == HexagonISD::CONST32 || in isTargetConstant()
H A DHexagonConstPropagation.cpp1981 case Hexagon::CONST32: in evaluate()
2337 case Hexagon::CONST32: in rewrite()
H A DHexagonHardwareLoops.cpp1515 case Hexagon::CONST32: in checkForImmediate()
H A DHexagonBitSimplify.cpp1431 case Hexagon::CONST32: in isTfrConst()
H A DHexagonPatterns.td405 def HexagonCONST32: SDNode<"HexagonISD::CONST32", SDTHexagonCONST32>;
/src/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1505 case Hexagon::CONST32: in processInstruction()