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Searched refs:CLK_SCLK_MPLL (Results 1 – 4 of 4) sorted by relevance

/src/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4210-trats.dts220 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
228 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
236 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
244 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
H A Dexynos4210-universal_c210.dts234 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
242 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
250 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
258 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
H A Dexynos4210-i9100.dts341 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
350 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
358 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
367 assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
/src/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dexynos4.h21 #define CLK_SCLK_MPLL 9 macro