| /src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandAtomicPseudoInsts.cpp | 294 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doAtomicBinOpExpansion() 382 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doMaskedAtomicBinOpExpansion() 542 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicMinMaxOp() 597 if (MBBI == E || MBBI->getOpcode() != RISCV::BNE) in tryToFoldBNEOnCmpXchgResult() 670 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg() 681 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg() 697 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg() 714 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
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| H A D | RISCVRedundantCopyElimination.cpp | 147 CondBr->getOpcode() == RISCV::BNE) && in optimizeBlock()
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| H A D | RISCVInstrInfoC.td | 974 def : CompressPat<(BNE GPRC:$rs1, X0, simm9_lsb0:$imm), 977 def : CompressPat<(BNE X0, GPRC:$rs1, simm9_lsb0:$imm),
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| H A D | RISCVInstrInfo.td | 629 def BNE : BranchCC_rri<0b001, "bne">; 909 (BNE GPR:$rs, X0, simm13_lsb0:$offset)>; 1455 defm : BccPat<SETNE, BNE>; 1463 def : BrccCompressOpt<SETNE, BNE>;
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| H A D | RISCVAsmPrinter.cpp | 681 MCInstBuilder(RISCV::BNE) in EmitHwasanMemaccessSymbols()
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| H A D | RISCVInstrInfo.cpp | 855 case RISCV::BNE: in getCondFromBranchOpc() 890 return Imm ? RISCV::CV_BNEIMM : RISCV::BNE; in getBrCond() 1275 case RISCV::BNE: in isBranchOffsetInRange()
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| H A D | RISCVISelLowering.cpp | 18151 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in emitReadCounterWidePseudo()
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| /src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 85 unsigned BNE = Mips::BNE; in expandAtomicCmpSwapSubword() local 93 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword() 149 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwapSubword() 213 unsigned LL, SC, ZERO, BNE, BEQ, MOVE; in expandAtomicCmpSwap() local 219 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap() 228 BNE = Mips::BNE; in expandAtomicCmpSwap() 238 BNE = Mips::BNE64; in expandAtomicCmpSwap() 279 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwap()
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| H A D | MipsInstrInfo.cpp | 317 case Mips::BNE: case Mips::BNE64: in isBranchOffsetInRange() 459 case Mips::BNE: in getEquivalentCompactForm() 501 case Mips::BNE: in getEquivalentCompactForm()
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| H A D | MipsSEInstrInfo.cpp | 475 case Mips::BEQ: return Mips::BNE; in getOppositeBranchOpc() 477 case Mips::BNE: return Mips::BEQ; in getOppositeBranchOpc() 630 return (Opc == Mips::BEQ || Opc == Mips::BEQ_MM || Opc == Mips::BNE || in getAnalyzableBrOpc()
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| H A D | MipsScheduleP5600.td | 74 BLTZAL, BLTZALL, BLTZL, BNE, BNEL, BREAK,
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| H A D | MipsInstrInfo.td | 2229 def BNE : MMRel, CBranch<"bne", brtarget, setne, GPR32Opnd>, BEQ_FM<5>, 2837 (BNE GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>, 3285 defm : BrcondPats<GPR32, BEQ, BEQ, BNE, SLT, SLTu, SLTi, SLTiu, ZERO>,
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| H A D | MipsScheduleGeneric.td | 286 def : InstRW<[GenericWriteJump], (instrs B, BAL, BAL_BR, BEQ, BNE, BGTZ, BGEZ,
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| H A D | MipsISelLowering.cpp | 1458 return emitPseudoSELECT(MI, BB, false, Mips::BNE); in EmitInstrWithCustomInserter() 4724 BuildMI(BB, DL, TII->get(Mips::BNE)) in emitPseudoD_SELECT()
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| /src/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.cpp | 333 case LoongArch::BNE: in isBranchOffsetInRange() 491 return LoongArch::BNE; in getOppositeBranchOpc() 492 case LoongArch::BNE: in getOppositeBranchOpc()
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| H A D | LoongArchExpandAtomicPseudoInsts.cpp | 510 BuildMI(LoopHeadMBB, DL, TII->get(LoongArch::BNE)) in expandAtomicCmpXchg() 545 BuildMI(LoopHeadMBB, DL, TII->get(LoongArch::BNE)) in expandAtomicCmpXchg()
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| H A D | LoongArchInstrInfo.td | 821 def BNE : BrCC_2RI16<0x5c000000>; 1441 def : BccPat<setne, BNE>;
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| /src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.cpp | 190 case RISCV::BNE: in relaxInstruction() 354 return RISCV::BNE; in getRelaxedOpcode() 360 case RISCV::BNE: in getRelaxedOpcode()
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| H A D | RISCVMCCodeEmitter.cpp | 229 return RISCV::BNE; in getInvertedBranchOp()
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| /src/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsInstPrinter.cpp | 285 case Mips::BNE: in printAlias()
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| /src/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 310 case LoongArch::BNE: in getExprOpValue()
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| /src/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/ |
| H A D | EmulateInstructionRISCV.cpp | 50 constexpr uint32_t BNE = 0b001; variable 172 case BNE: in CompareB() 358 if (bne_exit.funct3 != BNE) in AtomicSequence() 374 if (bne_start.funct3 != BNE) in AtomicSequence()
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| /src/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 1896 case Mips::BNE: in processInstruction() 3699 OpCode = Mips::BNE; in expandBranchImm() 4125 TOut.emitRRX(Mips::BNE, Mips::ZERO, Mips::ZERO, in expandCondBranches() 4175 TOut.emitRRX(AcceptsEquality ? Mips::BEQ : Mips::BNE, in expandCondBranches() 4218 : (AcceptsEquality ? Mips::BEQ : Mips::BNE), in expandCondBranches() 4349 TOut.emitRRX(Mips::BNE, RtReg, ZeroReg, LabelOp, IDLoc, STI); in expandDivRem() 4380 TOut.emitRRX(Mips::BNE, RtReg, ATReg, LabelOpEnd, IDLoc, STI); in expandDivRem() 4393 TOut.emitRRX(Mips::BNE, RsReg, ATReg, LabelOpEnd, IDLoc, STI); in expandDivRem()
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| /src/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 530 return Xtensa::BNE; in getBranchOpcode()
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| H A D | XtensaInstrInfo.td | 323 def BNE : Branch_RR<0x09, "bne", SETNE>;
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