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Searched refs:AllowZeroMoveEliminationOnly (Results 1 – 7 of 7) sorted by relevance

/src/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h116 bool AllowZeroMoveEliminationOnly; member
123 AllowZeroMoveEliminationOnly(AllowZeroMoveElimOnly) {} in NumPhysRegs()
/src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSchedule.h177 bool AllowZeroMoveEliminationOnly; member
/src/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenSchedule.h192 bool AllowZeroMoveEliminationOnly; member
202 AllowZeroMoveEliminationOnly(AllowZeroMoveElimOnly), NumPhysRegs(0) {} in Name()
H A DCodeGenSchedule.cpp1847 CGRF.AllowZeroMoveEliminationOnly = in collectRegisterFiles()
/src/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp156 RF.AllowZeroMoveEliminationOnly); in addRegisterFile()
423 return (!RMT.AllowZeroMoveEliminationOnly || IsZeroMove); in canEliminateMove()
/src/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSchedule.td555 bit AllowZeroMoveEliminationOnly = AllowZeroMoveElimOnly;
/src/contrib/llvm-project/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp775 << RD.AllowZeroMoveEliminationOnly << "},\n"; in EmitRegisterFileTables()