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Searched refs:ATA_OUTL (Results 1 – 23 of 23) sorted by relevance

/src/sys/dev/ahci/
H A Dahci_fsl_fdt.c204 ATA_OUTL(ctrl->r_ecc, AHCI_FSL_REG_ECC, in ahci_fsl_fdt_ecc_init()
215 ATA_OUTL(ctrl->r_ecc, AHCI_FSL_REG_ECC, val); in ahci_fsl_fdt_ecc_init()
228 ATA_OUTL(ctrl->r_ecc, AHCI_FSL_REG_ECC, val); in ahci_fsl_fdt_ecc_init()
247 ATA_OUTL(ahci->r_mem, AHCI_FSL_REG_PHY1, in ahci_fsl_fdt_phy_init()
249 ATA_OUTL(ahci->r_mem, AHCI_FSL_REG_PHY2, in ahci_fsl_fdt_phy_init()
251 ATA_OUTL(ahci->r_mem, AHCI_FSL_REG_PHY3, in ahci_fsl_fdt_phy_init()
253 ATA_OUTL(ahci->r_mem, AHCI_FSL_REG_PHY4, in ahci_fsl_fdt_phy_init()
255 ATA_OUTL(ahci->r_mem, AHCI_FSL_REG_PHY5, in ahci_fsl_fdt_phy_init()
257 ATA_OUTL(ahci->r_mem, AHCI_FSL_REG_PTC, in ahci_fsl_fdt_phy_init()
261 ATA_OUTL(ahci->r_mem, AHCI_FSL_LS1021A_AXICC, in ahci_fsl_fdt_phy_init()
[all …]
H A Dahci.c116 ATA_OUTL(ctlr->r_mem, AHCI_IS, ATA_INL(ctlr->r_mem, AHCI_IS)); in ahci_ctlr_setup()
119 ATA_OUTL(ctlr->r_mem, AHCI_CCCP, ATA_INL(ctlr->r_mem, AHCI_PI)); in ahci_ctlr_setup()
120 ATA_OUTL(ctlr->r_mem, AHCI_CCCC, in ahci_ctlr_setup()
133 ATA_OUTL(ctlr->r_mem, AHCI_GHC, in ahci_ctlr_setup()
150 ATA_OUTL(ctlr->r_mem, AHCI_BOHC, v | AHCI_BOHC_OOS); in ahci_ctlr_reset()
164 ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); in ahci_ctlr_reset()
166 ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE|AHCI_GHC_HR); in ahci_ctlr_reset()
177 ATA_OUTL(ctlr->r_mem, AHCI_GHC, AHCI_GHC_AE); in ahci_ctlr_reset()
187 ATA_OUTL(ctlr->r_mem, AHCI_CAP, ctlr->caps); in ahci_ctlr_reset()
240 ATA_OUTL(ctlr->r_mem, AHCI_PI, nmask); in ahci_attach()
[all …]
H A Dahci_mv_fdt.c70 ATA_OUTL(ctlr->r_mem, AHCI_VENDOR_SPECIFIC_0_ADDR, 0x4); in ahci_mv_regret_config()
71 ATA_OUTL(ctlr->r_mem, AHCI_VENDOR_SPECIFIC_0_DATA, 0x80); in ahci_mv_regret_config()
H A Dahciem.c237 ATA_OUTL(enc->r_memc, 0, AHCI_EM_RST); in ahci_em_reset()
316 ATA_OUTL(enc->r_memt, 0, (1 << 8) | (0 << 16) | (0 << 24)); in ahci_em_setleds()
317 ATA_OUTL(enc->r_memt, 4, c | (0 << 8) | (val << 16)); in ahci_em_setleds()
318 ATA_OUTL(enc->r_memc, 0, AHCI_EM_TM); in ahci_em_setleds()
H A Dahci_pci.c689 ATA_OUTL(ctlr->r_mem, AHCI_GHC, in ahci_pci_suspend()
H A Dahci.h571 #define ATA_OUTL(res, offset, value) \ macro
/src/sys/dev/mvs/
H A Dmvs_pci.c209 ATA_OUTL(ctlr->r_mem, CHIP_MIM, 0x00000000); in mvs_ctlr_setup()
211 ATA_OUTL(ctlr->r_mem, CHIP_PCIIM, 0x00000000); in mvs_ctlr_setup()
213 ATA_OUTL(ctlr->r_mem, CHIP_PCIIC, 0x00000000); in mvs_ctlr_setup()
222 ATA_OUTL(ctlr->r_mem, CHIP_ICT, cccc); in mvs_ctlr_setup()
223 ATA_OUTL(ctlr->r_mem, CHIP_ITT, ccc); in mvs_ctlr_setup()
224 ATA_OUTL(ctlr->r_mem, CHIP_ICC, ~CHIP_ICC_ALL_PORTS); in mvs_ctlr_setup()
232 ATA_OUTL(ctlr->r_mem, HC_BASE(i) + HC_ICT, cccc); in mvs_ctlr_setup()
233 ATA_OUTL(ctlr->r_mem, HC_BASE(i) + HC_ITT, ccc); in mvs_ctlr_setup()
237 ATA_OUTL(ctlr->r_mem, HC_BASE(i) + HC_IC, 0x00000000); in mvs_ctlr_setup()
243 ATA_OUTL(ctlr->r_mem, CHIP_MIM, ctlr->mim); in mvs_ctlr_setup()
[all …]
H A Dmvs.c255 ATA_OUTL(ch->r_mem, EDMA_IEM, 0); in mvs_ch_init()
260 ATA_OUTL(ch->r_mem, SATA_FISIC, 0); in mvs_ch_init()
263 ATA_OUTL(ch->r_mem, SATA_FISC, reg); in mvs_ch_init()
266 ATA_OUTL(ch->r_mem, SATA_FISC, reg); in mvs_ch_init()
268 ATA_OUTL(ch->r_mem, SATA_SE, 0xffffffff); in mvs_ch_init()
270 ATA_OUTL(ch->r_mem, EDMA_IEC, 0); in mvs_ch_init()
272 ATA_OUTL(ch->r_mem, EDMA_IEM, ~EDMA_IE_TRANSIENT); in mvs_ch_init()
284 ATA_OUTL(ch->r_mem, EDMA_IEM, 0); in mvs_ch_deinit()
472 ATA_OUTL(ch->r_mem, EDMA_REQQBAH, work >> 32); in mvs_setup_edma_queues()
473 ATA_OUTL(ch->r_mem, EDMA_REQQIP, work & 0xffffffff); in mvs_setup_edma_queues()
[all …]
H A Dmvs_soc.c207 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); in mvs_ctlr_setup()
209 ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000); in mvs_ctlr_setup()
211 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0); in mvs_ctlr_setup()
219 ATA_OUTL(ctlr->r_mem, HC_ICT, cccc); in mvs_ctlr_setup()
220 ATA_OUTL(ctlr->r_mem, HC_ITT, ccc); in mvs_ctlr_setup()
225 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); in mvs_ctlr_setup()
244 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); in mvs_edma()
255 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); in mvs_suspend()
317 ATA_OUTL(ctlr->r_mem, HC_IC, ~aic); in mvs_intr()
H A Dmvs.h651 #define ATA_OUTL(res, offset, value) \ macro
/src/sys/dev/ata/chipsets/
H A Data-promise.c273 ATA_OUTL(ctlr->r_res2, 0x000c000c, in ata_promise_chipinit()
332 ATA_OUTL(ctlr->r_res2, stat_reg, 0x000000ff); in ata_promise_chipinit()
336 ATA_OUTL(ctlr->r_res2, 0x44, ATA_INL(ctlr->r_res2, 0x44) | 0x2000); in ata_promise_chipinit()
397 ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20, in ata_promise_dmastart()
421 ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20, 0); in ata_promise_dmastop()
599 ATA_OUTL(ctlr->r_res2, 0x040, vector); in ata_promise_mio_intr()
635 ATA_OUTL(ctlr->r_res2, stat_reg, status & (0x00000011 << ch->unit)); in ata_promise_mio_status()
663 ATA_OUTL(ctlr->r_res2, (ch->unit + 1) << 2, 0x00000001); in ata_promise_mio_command()
690 ATA_OUTL(ctlr->r_res2, 0x0240 + (ch->unit << 7), ch->dma.work_bus); in ata_promise_mio_command()
706 ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7), ch->unit + 1); in ata_promise_mio_reset()
[all …]
H A Data-cyrix.c114 ATA_OUTL(ch->r_io[ATA_BMCMD_PORT].res, in ata_cyrix_setmode()
119 ATA_OUTL(ch->r_io[ATA_BMCMD_PORT].res, in ata_cyrix_setmode()
126 ATA_OUTL(ch->r_io[ATA_BMCMD_PORT].res, in ata_cyrix_setmode()
H A Data-nvidia.c218 ATA_OUTL(ctlr->r_res2, offset, 0x00ff00ff); in ata_nvidia_chipinit()
221 ATA_OUTL(ctlr->r_res2, offset + 4, 0x000d000d); in ata_nvidia_chipinit()
224 ATA_OUTL(ctlr->r_res2, 0x0400, in ata_nvidia_chipinit()
301 ATA_OUTL(ctlr->r_res2, offset, (0x0f << shift) | 0x00f000f0); in ata_nvidia_status()
H A Data-siliconimage.c132 ATA_OUTL(ctlr->r_res2, 0x0200, 0x00000002); in ata_sii_chipinit()
277 ATA_OUTL(ctlr->r_res2, 0x148 + (unit01 << 7) + (unit10 << 8),(1 << 16)); in ata_sii_ch_attach()
334 ATA_OUTL(ctlr->r_res2, 0x14c + offset, val & ~0x3); in ata_sii_reset()
H A Data-serverworks.c216 ATA_OUTL(ctlr->r_res2, ch_offset + 0x80, in ata_serverworks_ch_attach()
218 ATA_OUTL(ctlr->r_res2, ch_offset + 0x88, 0); in ata_serverworks_ch_attach()
H A Data-intel.c277 ATA_OUTL(ctlr->r_res2, 0x0C, in ata_intel_chipinit()
724 ATA_OUTL(ctlr->r_res2, offset + reg, value); in ata_intel_sata_ahci_write()
865 ATA_OUTL(ctlr->r_res2, 0x4, in ata_intel_31244_ch_attach()
/src/sys/arm/freescale/imx/
H A Dimx6_ahci.c82 ATA_OUTL(sc->r_mem, SATA_P0PHYCR, v); in imx6_ahci_phy_ctrl()
107 ATA_OUTL(sc->r_mem, SATA_P0PHYCR, addr); in imx6_ahci_phy_addr()
141 ATA_OUTL(sc->r_mem, SATA_P0PHYCR, data); in imx6_ahci_phy_write()
157 ATA_OUTL(sc->r_mem, SATA_P0PHYCR, in imx6_ahci_phy_write()
308 ATA_OUTL(ctlr->r_mem, AHCI_CAP, v | AHCI_CAP_SSS); in imx6_ahci_attach()
312 ATA_OUTL(ctlr->r_mem, AHCI_PI, v | (1 << 0)); in imx6_ahci_attach()
315 ATA_OUTL(ctlr->r_mem, SATA_TIMER1MS, in imx6_ahci_attach()
/src/sys/arm/allwinner/
H A Da10_ahci.c132 ATA_OUTL(m, off, val); in ahci_set()
141 ATA_OUTL(m, off, val); in ahci_clr()
151 ATA_OUTL(m, off, val); in ahci_mask_set()
176 ATA_OUTL(ctlr->r_mem, AHCI_RWCR, 0); in ahci_a10_phy_reset()
261 ATA_OUTL(ctlr->r_mem, AHCI_RWCR, 7); in ahci_a10_phy_reset()
276 ATA_OUTL(ch->r_mem, AHCI_P0DMACR, reg); in ahci_a10_ch_start()
/src/sys/dev/siis/
H A Dsiis.c236 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); in siis_suspend()
250 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); in siis_resume()
255 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); in siis_resume()
311 ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, in siis_intr()
580 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PORT_RESET); in siis_ch_init()
581 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_32BIT); in siis_ch_init()
583 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PME); in siis_ch_init()
585 ATA_OUTL(ch->r_mem, SIIS_P_CTLCLR, SIIS_P_CTL_PME); in siis_ch_init()
587 ATA_OUTL(ch->r_mem, SIIS_P_IESET, SIIS_P_IX_ENABLED); in siis_ch_init()
597 ATA_OUTL(ch->r_mem, SIIS_P_CTLSET, SIIS_P_CTL_PORT_RESET); in siis_ch_deinit()
[all …]
H A Dsiis.h447 #define ATA_OUTL(res, offset, value) \ macro
/src/sys/powerpc/mpc85xx/
H A Dfsl_sata.c308 #define ATA_OUTL(res, offset, value) \ macro
478 ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r & ~FSL_SATA_P_HCTRL_INT_MASK); in fsl_sata_init()
483 ATA_OUTL(ch->r_mem, FSL_SATA_P_CHBA, work); in fsl_sata_init()
486 ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r); in fsl_sata_init()
488 ATA_OUTL(ch->r_mem, FSL_SATA_P_PCC, r & ~FSL_SATA_PCC_LPB_EN); in fsl_sata_init()
489 ATA_OUTL(ch->r_mem, FSL_SATA_P_ICC, (1 << FSL_SATA_P_ICC_ITC_S)); in fsl_sata_init()
502 ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r & ~FSL_SATA_P_HCTRL_INT_MASK); in fsl_sata_deinit()
506 ATA_OUTL(ch->r_mem, FSL_SATA_P_SCTL, 0); in fsl_sata_deinit()
509 ATA_OUTL(ch->r_mem, FSL_SATA_P_SCTL, ATA_SC_DET_DISABLE); in fsl_sata_deinit()
512 ATA_OUTL(ch->r_mem, FSL_SATA_P_HCTRL, r & ~FSL_SATA_P_HCTRL_HC_ON); in fsl_sata_deinit()
[all …]
/src/sys/dev/ata/
H A Data-all.h525 #define ATA_OUTL(res, offset, value) \ macro
570 ATA_OUTL(ch->r_io[idx].res, ch->r_io[idx].offset, value)
/src/sys/arm/nvidia/
H A Dtegra_ahci.c746 ATA_OUTL(sc->ctlr.r_mem, AHCI_GHC, in tegra_ahci_suspend()