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Searched refs:TBL (Results 1 – 15 of 15) sorted by relevance

/src/crypto/openssl/crypto/aes/asm/
H A Daes-riscv64.pl95 my ($TBL) = use_regs(31);
155 add $I0,$TBL,$Ts->[0]
157 add $I0,$TBL,$Ts->[1]
159 add $I0,$TBL,$Ts->[2]
161 add $I0,$TBL,$Ts->[3]
201 add $I0,$TBL,$Ts->[0]
203 add $I0,$TBL,$Ts->[1]
205 add $I0,$TBL,$Ts->[2]
207 add $I0,$TBL,$Ts->[3]
245 la $TBL,AES_Te0
[all …]
/src/usr.bin/column/
H A Dcolumn.c221 } TBL; typedef
227 TBL *t; in maketbl()
231 TBL *tbl; in maketbl()
235 if ((t = tbl = calloc(entries, sizeof(TBL))) == NULL) in maketbl()
/src/usr.bin/man/
H A Dman.sh421 local EQN NROFF PIC TBL TROFF REFER VGRIND
459 for tool in EQN NROFF PIC TBL TROFF REFER VGRIND; do
485 t) pipeline="$pipeline | $TBL" ;;
493 pipeline="$TBL"
1130 TBL=tbl
/src/contrib/bmake/mk/
H A Ddoc.mk20 TBL?= tbl
/src/share/mk/
H A Dbsd.doc.mk60 TBL?= tbl
/src/crypto/openssl/doc/man3/
H A DOPENSSL_ppccap.pod110 CPU time base register from SPR 268, the TBL (time base lower) register, in order
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h349 TBL, enumerator
H A DAArch64SchedOryon.td1579 // TBL 1-reg/2-reg; TBX 1-reg, 1uOp, throughput=4 latency=2
1584 // TBL 3-reg/4-reg, 3uops, throughtput=4/3=1.33 latency=4
H A DAArch64SchedFalkorDetails.td957 def : InstRW<[FalkorWr_3VXVY_5cyc], (instregex "^TBL(v8i8Three|v16i8Two)$")>;
960 def : InstRW<[FalkorWr_4VXVY_6cyc], (instregex "^TBL(v8i8Four|v16i8Three)$")>;
H A DAArch64SchedCyclone.td611 // TBL,TBX are WriteV.
H A DAArch64ISelLowering.cpp2694 MAKE_CASE(AArch64ISD::TBL) in getTargetNodeName()
5762 return DAG.getNode(AArch64ISD::TBL, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
13385 SDValue TBL = DAG.getNode(AArch64ISD::TBL, DL, MVT::nxv2i64, V, ShuffleMask); in LowerDUPQLane() local
13386 return DAG.getNode(ISD::BITCAST, DL, VT, TBL); in LowerDUPQLane()
H A DAArch64InstrInfo.td933 def AArch64tbl : SDNode<"AArch64ISD::TBL", SDT_AArch64TBL>;
6567 // AdvSIMD TBL/TBX instructions
6570 defm TBL : SIMDTableLookup< 0, "tbl">;
H A DAArch64InstrFormats.td8093 // AdvSIMD TBL/TBX
/src/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_sve.td1040 // Note: svdup_lane is implemented using the intrinsic for TBL to represent a
/src/contrib/ncurses/
H A Daclocal.m47299 dnl "TBL" is too short, and likely to conflict.