| /qemu/tests/tcg/multiarch/ |
| H A D | sha512.c | 274 uint64_t w0, w1, w2, w3, w4, w5, w6, w7, w8, w9, w10, w11, w12, w13, w14, w15; in Transform() local
283 Round(b, c, d, &e, f, g, h, &a, 0xab1c5ed5da6d8118ull, w7 = be64_to_cpu(chunk[7])); in Transform()
299 Round(c, d, e, &f, g, h, a, &b, 0x5cb0a9dcbd41fbd4ull, w6 += sigma1(w4) + w15 + sigma0(w7)); in Transform()
300 Round(b, c, d, &e, f, g, h, &a, 0x76f988da831153b5ull, w7 += sigma1(w5) + w0 + sigma0(w8)); in Transform()
302 Round(h, a, b, &c, d, e, f, &g, 0xa831c66d2db43210ull, w9 += sigma1(w7) + w2 + sigma0(w10)); in Transform()
307 Round(c, d, e, &f, g, h, a, &b, 0x06ca6351e003826full, w14 += sigma1(w12) + w7 + sigma0(w15)); in Transform()
316 Round(c, d, e, &f, g, h, a, &b, 0x81c2c92e47edaee6ull, w6 += sigma1(w4) + w15 + sigma0(w7)); in Transform()
317 Round(b, c, d, &e, f, g, h, &a, 0x92722c851482353bull, w7 += sigma1(w5) + w0 + sigma0(w8)); in Transform()
319 Round(h, a, b, &c, d, e, f, &g, 0xa81a664bbc423001ull, w9 += sigma1(w7) + w2 + sigma0(w10)); in Transform()
324 Round(c, d, e, &f, g, h, a, &b, 0xf40e35855771202aull, w14 += sigma1(w12) + w7 + sigma0(w15)); in Transform()
[all …]
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| /qemu/tests/qtest/ |
| H A D | pnv-xive2-common.c | 106 nvp.w7 = xive_set_field32(NVP2_W7_REPORTING_LINE, nvp.w7, in set_nvp()
114 uint64_t lower = xive_get_field32(0xffffff00, nvp->w7); in get_cl_pair_addr()
187 end.w7 = xive_set_field32(END2_W7_F0_PRIORITY, 0, priority); in set_end()
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| /qemu/include/hw/ppc/ |
| H A D | xive2_regs.h | 105 uint32_t w7; member
182 uint32_t w7; member
228 uint32_t w7; member
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| H A D | xive_regs.h | 264 uint32_t w7; member
307 uint32_t w7; member
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| /qemu/hw/intc/ |
| H A D | spapr_xive.c | 141 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in spapr_xive_end_pic_print_info()
533 VMSTATE_UINT32(w7, XiveEND),
1203 args[1] = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in h_int_get_source_config()
1422 end.w7 = xive_set_field32(END_W7_F0_PRIORITY, 0ul, priority); in h_int_set_queue_config()
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| H A D | xive2.c | 41 xive_get_field32(NVP2_W7_REPORTING_LINE, nvp->w7); in xive2_nvp_reporting_addr()
231 uint8_t priority = xive_get_field32(END2_W7_F0_PRIORITY, end->w7); in xive2_end_pic_print_info()
1375 priority = xive_get_field32(END2_W7_F0_PRIORITY, end.w7); in xive2_router_end_notify()
1403 xive_get_field32(END2_W7_F1_LOG_SERVER_ID, end.w7), in xive2_router_end_notify()
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| H A D | xive.c | 1481 uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); in xive_end_pic_print_info()
1921 priority = xive_get_field32(END_W7_F0_PRIORITY, end.w7); in xive_router_end_notify()
1961 xive_get_field32(END_W7_F0_IGNORE, end.w7), in xive_router_end_notify()
1963 xive_get_field32(END_W7_F1_LOG_SERVER_ID, end.w7), in xive_router_end_notify()
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| /qemu/tests/tcg/mips/include/ |
| H A D | wrappers_msa.h | 45 RESET_MSA_REGISTER(w7); in reset_msa_registers()
|