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Searched refs:vsew (Results 1 – 5 of 5) sorted by relevance

/qemu/tcg/riscv/
H A Dtcg-target.c.inc540 MemOp vsew, RISCVVlmul vlmul)
542 return vma << 7 | vta << 6 | vsew << 3 | vlmul;
726 static void set_vtype(TCGContext *s, TCGType type, MemOp vsew)
728 const VsetCache *p = &riscv_vset_cache[type - TCG_TYPE_V64][vsew];
731 s->riscv_cur_vsew = vsew;
747 static void set_vtype_len_sew(TCGContext *s, TCGType type, MemOp vsew)
749 if (type != s->riscv_cur_type || vsew != s->riscv_cur_vsew) {
750 set_vtype(s, type, vsew);
2995 static void probe_frac_lmul_1(TCGType type, MemOp vsew)
2997 VsetCache *p = &riscv_vset_cache[type - TCG_TYPE_V64][vsew];
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/qemu/target/riscv/tcg/
H A Dtcg-cpu.c121 uint32_t vsew = FIELD_EX64(env->vtype, VTYPE, VSEW); in riscv_get_tb_cpu_state() local
122 uint32_t vlmax = vext_get_vlmax(cpu->cfg.vlenb, vsew, lmul); in riscv_get_tb_cpu_state()
123 uint32_t maxsz = vlmax << vsew; in riscv_get_tb_cpu_state()
127 flags = FIELD_DP32(flags, TB_FLAGS, SEW, vsew); in riscv_get_tb_cpu_state()
/qemu/target/riscv/
H A Dcpu.h820 static inline uint32_t vext_get_vlmax(uint32_t vlenb, uint32_t vsew, in vext_get_vlmax() argument
830 return vlen >> (vsew + 3 - lmul); in vext_get_vlmax()
H A Dvector_helper.c43 uint8_t vsew = FIELD_EX64(s2, VTYPE, VSEW); in HELPER() local
44 uint16_t sew = 8 << vsew; in HELPER()
78 vlmax = vext_get_vlmax(cpu->cfg.vlenb, vsew, lmul); in HELPER()
/qemu/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc3955 * Whole Vector Register Move Instructions depend on vtype register(vsew).