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Searched refs:vra (Results 1 – 6 of 6) sorted by relevance

/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc686 gen_gvec(vece, avr_full_offset(a->vrt), avr_full_offset(a->vra),
774 static void gen_vrlnm_vec(unsigned vece, TCGv_vec vrt, TCGv_vec vra,
787 tcg_gen_rotlv_vec(vece, vrt, vra, n);
817 tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra),
826 static void gen_vrlmi_vec(unsigned vece, TCGv_vec vrt, TCGv_vec vra,
840 tcg_gen_rotlv_vec(vece, tmp, vra, n);
870 tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra),
891 get_avr64(lo, a->vra, false);
892 get_avr64(hi, a->vra, true);
1007 get_avr64(ah, a->vra, true);
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H A Dfixedpoint-impl.c.inc641 tcg_gen_mul_i64(t1, cpu_gpr[a->vra], cpu_gpr[a->vrb]);
658 tcg_gen_muls2_i64(lo, hi, cpu_gpr[a->vra], cpu_gpr[a->vrb]);
676 tcg_gen_mulu2_i64(lo, hi, cpu_gpr[a->vra], cpu_gpr[a->vrb]);
H A Dvsx-impl.c.inc1425 int vrt, vra, vrb;
1431 vra = a->ra + 32;
1435 return do_xsmadd(ctx, vrt, vra, vrt, vrb, gen_helper_ro);
1438 return do_xsmadd(ctx, vrt, vra, vrt, vrb, gen_helper);
/qemu/subprojects/libvhost-user/
H A Dlibvhost-user.c289 vq->vring.desc = qva_to_va(dev, vq->vra.desc_user_addr); in map_ring()
290 vq->vring.used = qva_to_va(dev, vq->vra.used_user_addr); in map_ring()
291 vq->vring.avail = qva_to_va(dev, vq->vra.avail_user_addr); in map_ring()
318 if (!vq->vra.desc_user_addr || !vq->vra.used_user_addr || in vu_is_vq_usable()
319 !vq->vra.avail_user_addr) { in vu_is_vq_usable()
1211 struct vhost_vring_addr addr = vmsg->payload.addr, *vra = &addr; in vu_set_vring_addr_exec() local
1212 unsigned int index = vra->index; in vu_set_vring_addr_exec()
1216 DPRINT(" index: %d\n", vra->index); in vu_set_vring_addr_exec()
1217 DPRINT(" flags: %d\n", vra->flags); in vu_set_vring_addr_exec()
1218 DPRINT(" desc_user_addr: 0x%016" PRIx64 "\n", (uint64_t)vra->desc_user_addr); in vu_set_vring_addr_exec()
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H A Dlibvhost-user.h373 struct vhost_vring_addr vra; member
/qemu/target/ppc/
H A Dinsn32.decode69 &VA vrt vra vrb rc
70 @VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA
72 &VC vrt vra vrb rc:bool
73 @VC ...... vrt:5 vra:5 vrb:5 rc:1 .......... &VC
75 &VN vrt vra vrb sh
76 @VN ...... vrt:5 vra:5 vrb:5 .. sh:3 ...... &VN
78 &VX vrt vra vrb
79 @VX ...... vrt:5 vra:5 vrb:5 .......... . &VX
81 &VX_bf bf vra vrb
82 @VX_bf ...... bf:3 .. vra:5 vrb:5 ........... &VX_bf