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Searched refs:usp (Results 1 – 20 of 20) sorted by relevance

/qemu/hw/pci-bridge/
H A Dcxl_upstream.c35 CXLComponentState *cxl_usp_to_cstate(CXLUpstreamPort *usp) in cxl_usp_to_cstate() argument
37 return &usp->cxl_cstate; in cxl_usp_to_cstate()
43 CXLUpstreamPort *usp = CXL_USP(dev); in cxl_usp_dvsec_write_config() local
45 if (range_contains(&usp->cxl_cstate.dvsecs[EXTENSIONS_PORT_DVSEC], addr)) { in cxl_usp_dvsec_write_config()
47 addr -= usp->cxl_cstate.dvsecs[EXTENSIONS_PORT_DVSEC].lob; in cxl_usp_dvsec_write_config()
65 CXLUpstreamPort *usp = CXL_USP(d); in cxl_usp_write_config() local
67 pcie_doe_write_config(&usp->doe_cdat, address, val, len); in cxl_usp_write_config()
77 CXLUpstreamPort *usp = CXL_USP(d); in cxl_usp_read_config() local
80 if (pcie_doe_read_config(&usp->doe_cdat, address, len, &val)) { in cxl_usp_read_config()
87 static void latch_registers(CXLUpstreamPort *usp) in latch_registers() argument
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/qemu/target/rx/
H A Dgdbstub.c30 return gdb_get_regl(mem_buf, (env->psw_u) ? env->regs[0] : env->usp); in rx_cpu_gdb_read_register()
62 env->usp = env->regs[0]; in rx_cpu_gdb_write_register()
69 env->usp = ldl_p(mem_buf); in rx_cpu_gdb_write_register()
H A Dhelper.c53 env->usp = env->regs[0]; in rx_cpu_do_interrupt()
H A Dop_helper.c40 env->regs[0] = env->usp; in _set_psw()
42 env->usp = env->regs[0]; in _set_psw()
H A Dcpu.h89 uint32_t usp; /* vector base register */ member
H A Dcpu.c106 env->regs[0] = env->isp = env->usp = 0; in rx_cpu_reset_hold()
H A Dtranslate.c2294 ALLOC_REGISTER(usp, "USP"); in rx_translate_init()
/qemu/hw/cxl/
H A Dswitch-mailbox-cci.c34 CXLUpstreamPort *usp; in cswbcci_realize() local
40 usp = CXL_USP(cswmb->target); in cswbcci_realize()
45 cswmb->cci = &usp->swcci; in cswbcci_realize()
H A Dcxl-host.c157 CXLUpstreamPort *usp; in cxl_cfmws_find_device() local
213 usp = CXL_USP(d); in cxl_cfmws_find_device()
215 usp_cstate = cxl_usp_to_cstate(usp); in cxl_cfmws_find_device()
H A Dcxl-mailbox-utils.c204 CXLUpstreamPort *usp = CXL_USP(cci->d); in cmd_tunnel_management_cmd() local
206 tunnel_target = pcie_find_port_by_pn(&PCI_BRIDGE(usp)->sec_bus, in cmd_tunnel_management_cmd()
499 PCIEPort *usp = PCIE_PORT(cci->d); in cmd_identify_switch_device() local
536 out->active_port_bitmask[usp->port / 8] |= (1 << usp->port % 8); in cmd_identify_switch_device()
586 PCIEPort *usp = PCIE_PORT(cci->d); in cmd_get_physical_port_state() local
627 } else if (usp->port == in->ports[i]) { /* USP */ in cmd_get_physical_port_state()
628 port_dev = PCI_DEVICE(usp); in cmd_get_physical_port_state()
/qemu/linux-user/m68k/
H A Dtarget_syscall.h11 abi_ulong usp; member
H A Dcpu_loop.c117 env->aregs[7] = regs->usp; in target_cpu_copy_regs()
/qemu/include/hw/cxl/
H A Dcxl.h63 CXLComponentState *cxl_usp_to_cstate(CXLUpstreamPort *usp);
/qemu/util/
H A Dcoroutine-ucontext.c242 void *usp = co->unsafe_stack + co->unsafe_stack_size; in qemu_coroutine_new() local
243 __safestack_unsafe_stack_ptr = usp; in qemu_coroutine_new()
/qemu/linux-user/alpha/
H A Dtarget_syscall.h40 abi_ulong usp; member
H A Dcpu_loop.c183 env->ir[IR_SP] = regs->usp; in target_cpu_copy_regs()
/qemu/target/alpha/
H A Dmachine.c61 VMSTATE_UINTTL(usp, CPUAlphaState),
H A Dcpu.h239 uint64_t usp; member
H A Dtranslate.c1122 offsetof(CPUAlphaState, usp)); in gen_call_pal()
1127 offsetof(CPUAlphaState, usp)); in gen_call_pal()
1196 case 12: return offsetof(CPUAlphaState, usp); in cpu_pr_data()
/qemu/linux-user/
H A Delfload.c1682 regs->usp = infop->start_stack; in init_thread()
1730 regs->usp = infop->start_stack; in init_thread()