Searched refs:tval (Results 1 – 8 of 8) sorted by relevance
/qemu/hw/input/ |
H A D | virtio-input-host.c | 198 struct timeval tval; in virtio_input_host_handle_status() local 201 if (gettimeofday(&tval, NULL)) { in virtio_input_host_handle_status() 206 evdev.input_event_sec = tval.tv_sec; in virtio_input_host_handle_status() 207 evdev.input_event_usec = tval.tv_usec; in virtio_input_host_handle_status()
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/qemu/target/riscv/ |
H A D | trace-events | 2 …t cause, uint64_t epc, uint64_t tval, const char *desc) "hart:%"PRId64", async:%d, cause:%"PRId64"…
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H A D | cpu_helper.c | 2178 target_ulong tval = 0; in riscv_cpu_do_interrupt() local 2214 tval = env->badaddr; in riscv_cpu_do_interrupt() 2226 tinst = riscv_transformed_insn(env, env->bins, tval); in riscv_cpu_do_interrupt() 2234 tval = env->badaddr; in riscv_cpu_do_interrupt() 2245 tval = env->bins; in riscv_cpu_do_interrupt() 2248 tval = env->badaddr; in riscv_cpu_do_interrupt() 2250 tval = cs->watchpoint_hit->hitaddr; in riscv_cpu_do_interrupt() 2255 tval = env->sw_check_code; in riscv_cpu_do_interrupt() 2276 trace_riscv_trap(env->mhartid, async, cause, env->pc, tval, in riscv_cpu_do_interrupt() 2282 __func__, env->mhartid, async, cause, env->pc, tval, in riscv_cpu_do_interrupt() [all …]
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/qemu/contrib/vhost-user-input/ |
H A D | main.c | 117 struct timeval tval; in vi_handle_status() local 120 if (gettimeofday(&tval, NULL)) { in vi_handle_status() 125 evdev.input_event_sec = tval.tv_sec; in vi_handle_status() 126 evdev.input_event_usec = tval.tv_usec; in vi_handle_status()
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/qemu/hw/usb/ |
H A D | hcd-dwc2.c | 879 uint32_t tval, told, old; in dwc2_hreg0_write() local 915 tval = val & (HPRT0_OVRCURRCHG | HPRT0_ENACHG | HPRT0_ENA | in dwc2_hreg0_write() 919 tval |= ~told; in dwc2_hreg0_write() 920 tval = ~tval; in dwc2_hreg0_write() 921 tval &= (HPRT0_OVRCURRCHG | HPRT0_ENACHG | HPRT0_ENA | in dwc2_hreg0_write() 925 val |= tval; in dwc2_hreg0_write()
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/qemu/hw/ppc/ |
H A D | vof.c | 77 static void prop_format(char *tval, int tlen, const void *prop, int len) in prop_format() argument 86 strncpy(tval, prop, tlen - 1); in prop_format() 94 for (i = 0, c = prop, t = tval; i < len; ++i, ++c) { in prop_format() 95 if (t >= tval + tlen - sizeof(bin) - 1 - 2 - 1) { in prop_format()
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/qemu/target/microblaze/ |
H A D | translate.c | 1016 TCGv_i32 tval; in trans_swx() local 1033 tval = tcg_temp_new_i32(); in trans_swx() 1035 tcg_gen_atomic_cmpxchg_i32(tval, cpu_res_addr, cpu_res_val, in trans_swx() 1039 tcg_gen_brcond_i32(TCG_COND_NE, cpu_res_val, tval, swx_fail); in trans_swx()
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/qemu/target/mips/tcg/ |
H A D | nanomips_translate.c.inc | 996 TCGv_i64 tval = tcg_temp_new_i64(); 1001 tcg_gen_qemu_ld_i64(tval, taddr, ctx->mem_idx, 1004 tcg_gen_extr_i64_tl(tmp2, tmp1, tval); 1006 tcg_gen_extr_i64_tl(tmp1, tmp2, tval); 1010 tcg_gen_st_i64(tval, tcg_env, offsetof(CPUMIPSState, llval_wp)); 1019 TCGv_i64 tval = tcg_temp_new_i64(); 1036 tcg_gen_concat_tl_i64(tval, tmp2, tmp1); 1038 tcg_gen_concat_tl_i64(tval, tmp1, tmp2); 1042 tcg_gen_atomic_cmpxchg_i64(val, taddr, llval, tval,
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