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Searched refs:ttr (Results 1 – 5 of 5) sorted by relevance

/qemu/target/m68k/
H A Dmonitor.c51 { "dttr0", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR0]) },
52 { "dttr1", offsetof(CPUM68KState, mmu.ttr[M68K_DTTR1]) },
53 { "ittr0", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR0]) },
54 { "ittr1", offsetof(CPUM68KState, mmu.ttr[M68K_ITTR1]) },
H A Dhelper.c258 env->mmu.ttr[M68K_ITTR0] = val; in HELPER()
265 env->mmu.ttr[M68K_ITTR1] = val; in HELPER()
272 env->mmu.ttr[M68K_DTTR0] = val; in HELPER()
279 env->mmu.ttr[M68K_DTTR1] = val; in HELPER()
366 return env->mmu.ttr[M68K_ITTR0]; in HELPER()
372 return env->mmu.ttr[M68K_ITTR1]; in HELPER()
378 return env->mmu.ttr[M68K_DTTR0]; in HELPER()
384 return env->mmu.ttr[M68K_DTTR1]; in HELPER()
582 static void dump_ttr(uint32_t ttr) in dump_ttr() argument
584 if ((ttr & M68K_TTR_ENABLED) == 0) { in dump_ttr()
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H A Dcpu.h79 #define TTR(type, index) ttr[((type & ACCESS_CODE) == ACCESS_CODE) * 2 + index]
138 uint32_t ttr[4]; member
H A Dcpu.c544 VMSTATE_UINT32_ARRAY(env.mmu.ttr, M68kCPU, 4),
H A Dtranslate.c6204 env->mmu.ttr[M68K_DTTR0], env->mmu.ttr[M68K_DTTR1], in m68k_cpu_dump_state()
6205 env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]); in m68k_cpu_dump_state()