Searched refs:ttb (Results 1 – 8 of 8) sorted by relevance
| /qemu/tests/tcg/aarch64/system/ |
| H A D | boot.S | 94 adrp x0, ttb
95 add x0, x0, :lo12:ttb
241 ttb: label
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| /qemu/tests/tcg/arm/system/ |
| H A D | boot.S | 118 ldr r0, =ttb
167 ldr r0, =ttb
309 ttb: label
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| /qemu/include/hw/arm/ |
| H A D | smmu-common.h | 71 uint64_t ttb; /* TT base address */ member
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| /qemu/hw/arm/ |
| H A D | smmuv3.c | 779 tt->ttb = CD_TTB(cd, i); in decode_cd()
781 if (tt->ttb & ~(MAKE_64BIT_MASK(0, cfg->oas))) { in decode_cd()
787 status = smmuv3_do_translate(s, tt->ttb, cfg, event, IOMMU_RO, in decode_cd()
797 tt->ttb = CACHED_ENTRY_TO_ADDR(entry, tt->ttb); in decode_cd()
801 trace_smmuv3_decode_cd_tt(i, tt->tsz, tt->ttb, tt->granule_sz, tt->had); in decode_cd()
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| H A D | trace-events | 53 …mmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz, bool had) "TT[%d]:tsz:%…
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| H A D | smmu-common.c | 477 baseaddr = extract64(tt->ttb, 0, cfg->oas); in smmu_ptw_64_s1()
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| /qemu/target/sh4/ |
| H A D | cpu.h | 182 uint32_t ttb; /* translation table base register */ member
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| /qemu/hw/sh4/ |
| H A D | sh7750.c | 238 return s->cpu->env.ttb; in sh7750_mem_readl()
390 s->cpu->env.ttb = mem_value; in sh7750_mem_writel()
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