/qemu/hw/i386/ |
H A D | amd_iommu.c | 1091 MSIMessage *translated, in amdvi_int_remap_legacy() argument 1150 MSIMessage *translated, in amdvi_int_remap_ga() argument 1195 MSIMessage *translated, in __amdvi_int_remap_msi() argument 1208 memcpy(translated, origin, sizeof(*origin)); in __amdvi_int_remap_msi() 1221 ret = amdvi_int_remap_ga(iommu, origin, translated, dte, irq, sid); in __amdvi_int_remap_msi() 1223 ret = amdvi_int_remap_legacy(iommu, origin, translated, dte, irq, sid); in __amdvi_int_remap_msi() 1232 MSIMessage *translated, in amdvi_int_remap_msi() argument 1241 assert(origin && translated); in amdvi_int_remap_msi() 1257 memcpy(translated, origin, sizeof(*origin)); in amdvi_int_remap_msi() 1267 memcpy(translated, origin, sizeof(*origin)); in amdvi_int_remap_msi() [all …]
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H A D | trace-events | 39 …skip_map(uint64_t iova, uint64_t mask, uint64_t translated) "iova 0x%"PRIx64" mask 0x%"PRIx64" tra…
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H A D | intel_iommu.c | 3981 MSIMessage *translated, in vtd_interrupt_remap_msi() argument 3988 assert(origin && translated); in vtd_interrupt_remap_msi() 3993 memcpy(translated, origin, sizeof(*origin)); in vtd_interrupt_remap_msi() 4018 memcpy(translated, origin, sizeof(*origin)); in vtd_interrupt_remap_msi() 4074 x86_iommu_irq_to_msi_message(&irq, translated); in vtd_interrupt_remap_msi() 4078 translated->address, translated->data); in vtd_interrupt_remap_msi()
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/qemu/docs/devel/ |
H A D | tcg.rst | 36 After each translated basic block is executed, QEMU uses the simulated 45 prologue and then moving on to the translated instructions. 88 instruction that later on gets translated to a jump to an address 127 Self-modifying code and translated code invalidation 135 not already read-only) every time translated code is generated for a 137 a SEGV signal. QEMU then invalidates all the translated code in the page 141 Correct translated code invalidation is done efficiently by maintaining 142 a linked list of every translated block contained in a given page. Other 178 In order to avoid flushing the translated code each time the MMU
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H A D | multi-thread-tcg.rst | 15 thread structure of the translated executable although some of the 41 In the general case of running translated code there should be no 81 generation patching of the translated code. This also implies a shared 176 hot-path can be handled entirely within translated code. This is 179 translated code. It is possible to set flags in the TLB address which
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H A D | tcg-icount.rst | 41 translated block and will cause a return to the outer loop to deal
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H A D | tcg-plugins.rst | 95 It is quite normal to see the same address translated multiple times.
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H A D | loads-stores.rst | 78 translated, plus a ``MemOp`` which contains alignment requirements
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H A D | multi-process.rst | 552 that physical address can be translated to a local virtual address. The
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/qemu/target/arm/ |
H A D | trace-events | 15 kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%…
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/qemu/docs/system/ |
H A D | target-avr.rst | 45 - Print out executed instructions (that have not been translated by the JIT
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/qemu/hw/xen/ |
H A D | xen-mapcache.c | 339 bool translated G_GNUC_UNUSED = false; in xen_map_cache_unlocked() 420 if (!translated && mc->phys_offset_to_gaddr) { in xen_map_cache_unlocked() 422 translated = true; in xen_map_cache_unlocked()
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/qemu/hw/arm/ |
H A D | trace-events | 50 …, uint16_t sid, uint64_t iova, uint64_t translated, int perm, int stage) "%s sid=0x%x iova=0x%"PRI…
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/qemu/docs/specs/ |
H A D | ppc-spapr-numa.rst | 206 have to accept that a large array of values will be translated to the same 225 Will both be translated to the same values internally: 360 * 'non-transitive' topologies will be poorly translated to the guest. This is the
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/qemu/docs/system/devices/ |
H A D | virtio-gpu.rst | 63 are translated into an intermediate representation (see `Gallium3D`_). The
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/qemu/ui/ |
H A D | trace-events | 25 …char *tab, int gdk_keycode, int qkeycode, const char *action) "tab=%s, translated GDK keycode %d t… 98 sdl2_process_key(int sdl_scancode, int qcode, const char *action) "translated SDL scancode %d to QK…
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/qemu/docs/interop/ |
H A D | qed_spec.txt | 109 Logical offsets are translated into cluster offsets as follows:
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H A D | vhost-user.rst | 681 translated to user addresses via the IOTLB.
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/qemu/docs/devel/migration/ |
H A D | postcopy.rst | 14 a fault that's translated by QEMU into a request to the source QEMU.
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/qemu/linux-headers/LICENSES/preferred/ |
H A D | GPL-2.0 | 87 either verbatim or with modifications and/or translated into another
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/qemu/ |
H A D | COPYING | 68 either verbatim or with modifications and/or translated into another
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/qemu/target/mips/tcg/ |
H A D | micromips_translate.c.inc | 1289 * of translated code to check for pending interrupts.
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