/qemu/tcg/loongarch64/ |
H A D | tcg-insn-defs.c.inc | 1322 tcg_out32(s, encode_tdj_insn(OPC_MOVGR2SCR, td, j)); 1329 tcg_out32(s, encode_dtj_insn(OPC_MOVSCR2GR, d, tj)); 1336 tcg_out32(s, encode_dj_insn(OPC_CLZ_W, d, j)); 1343 tcg_out32(s, encode_dj_insn(OPC_CTZ_W, d, j)); 1350 tcg_out32(s, encode_dj_insn(OPC_CLZ_D, d, j)); 1357 tcg_out32(s, encode_dj_insn(OPC_CTZ_D, d, j)); 1364 tcg_out32(s, encode_dj_insn(OPC_REVB_2H, d, j)); 1371 tcg_out32(s, encode_dj_insn(OPC_REVB_2W, d, j)); 1378 tcg_out32(s, encode_dj_insn(OPC_REVB_D, d, j)); 1385 tcg_out32(s, encode_dj_insn(OPC_SEXT_H, d, j)); [all …]
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H A D | tcg-target.c.inc | 796 tcg_out32(s, encode_djsk16_insn(op, arg1, arg2, 0)); 874 tcg_out32(s, encode_djsk12_insn(opc, data, addr, imm12)); 880 tcg_out32(s, encode_fdjsk12_insn(opc, data, addr, imm12)); 2057 tcg_out32(s, encode_vdj_insn(repl_insn[lasx][vece], rd, rs)); 2170 tcg_out32(s, encode_vdvjuk5_insn(insn, a0, a1, value)); 2179 tcg_out32(s, encode_vdvjvk_insn(insn, a0, a1, a2)); 2364 tcg_out32(s, encode_vdvjsk5_insn(insn, a0, a1, value)); 2369 tcg_out32(s, encode_vdvjuk5_insn(insn, a0, a1, value)); 2394 tcg_out32(s, encode_vdvj_insn(neg_vec_insn[lasx][vece], a0, a1)); 2434 tcg_out32(s, encode_vdvj_insn(neg_vec_insn[lasx][vece], [all …]
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/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 814 tcg_out32(s, NOP); 833 tcg_out32(s, p); 834 tcg_out32(s, i); 847 tcg_out32(s, p); 848 tcg_out32(s, i); 866 tcg_out32(s, OR | SAB(arg, ret, arg)); 869 tcg_out32(s, (type == TCG_TYPE_I32 ? MFVSRWZ : MFVSRD) 878 tcg_out32(s, (type == TCG_TYPE_I32 ? MTVSRWZ : MTVSRD) 890 tcg_out32(s, VOR | VRT(ret) | VRA(arg) | VRB(arg)); 904 tcg_out32(s, op | RA(ra) | RS(rs) | sh | mb | rc); [all …]
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/qemu/tcg/tci/ |
H A D | tcg-target.c.inc | 126 tcg_out32(s, insn); 146 tcg_out32(s, insn); 155 tcg_out32(s, insn); 160 tcg_out32(s, (uint8_t)op); 171 tcg_out32(s, insn); 181 tcg_out32(s, insn); 191 tcg_out32(s, insn); 204 tcg_out32(s, insn); 216 tcg_out32(s, insn); 229 tcg_out32(s, insn); [all …]
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/qemu/tcg/arm/ |
H A D | tcg-target.c.inc | 549 tcg_out32(s, (cond << 28) | INSN_B | 555 tcg_out32(s, (cond << 28) | 0x0b000000 | 561 tcg_out32(s, (cond << 28) | 0x012fff30 | rn); 566 tcg_out32(s, 0xfa000000 | ((offset & 2) << 23) | 573 tcg_out32(s, (cond << 28) | (0 << 25) | opc | 587 tcg_out32(s, (cond << 28) | 0x012fff10 | rn); 602 tcg_out32(s, (cond << 28) | (1 << 25) | opc | 609 tcg_out32(s, (cond << 28) | opc | (rn << 16) | mask); 617 tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) 629 tcg_out32(s, (cond << 28) | opc | (u << 23) | (p << 24) | (w << 21) | [all …]
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/qemu/tcg/aarch64/ |
H A D | tcg-target.c.inc | 667 tcg_out32(s, insn | (rt & 0x1f) | (rn << 5) | (size << 10) | (q << 30)); 673 tcg_out32(s, insn | (imm19 & 0x7ffff) << 5 | rt); 679 tcg_out32(s, insn | rs << 16 | rt2 << 10 | rn << 5 | rt); 685 tcg_out32(s, insn | ext << 31 | (imm19 & 0x7ffff) << 5 | rt); 691 tcg_out32(s, insn | tcg_cond_to_aarch64[c] | (imm19 & 0x7ffff) << 5); 699 tcg_out32(s, insn | (imm14 & 0x3fff) << 5 | rt); 704 tcg_out32(s, insn | (imm26 & 0x03ffffff)); 709 tcg_out32(s, insn | rn << 5); 723 tcg_out32(s, insn | r2 << 10 | rn << 5 | r1); 735 tcg_out32(s, insn | ext << 31 | aimm << 10 | rn << 5 | rd); [all …]
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/qemu/tcg/sparc64/ |
H A D | tcg-target.c.inc | 361 tcg_out32(s, NOP); 367 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | INSN_RS2(rs2)); 373 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) | INSN_IMM13(offset)); 379 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) 402 tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10)); 478 tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(TCG_REG_TB)); 565 tcg_out32(s, op | INSN_RD(data) | INSN_RS1(a1) | INSN_RS2(a2)); 572 tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) | 604 tcg_out32(s, WRY | INSN_RS1(TCG_REG_G0) | INSN_RS2(rs)); 633 tcg_out32(s, INSN_OP(0) | INSN_OP2(1) | INSN_COND(scond) | flags | off19); [all …]
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/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 564 tcg_out32(s, encode_r(opc, rd, rs1, rs2)); 570 tcg_out32(s, encode_i(opc, rd, rs1, imm)); 576 tcg_out32(s, encode_s(opc, rs1, rs2, imm)); 582 tcg_out32(s, encode_sb(opc, rs1, rs2, imm)); 588 tcg_out32(s, encode_u(opc, rd, imm)); 594 tcg_out32(s, encode_uj(opc, rd, imm)); 682 tcg_out32(s, encode_v(opc, vd, vs1, vs2, true)); 688 tcg_out32(s, encode_v(opc, vd, rs1, vs2, true)); 694 tcg_out32(s, encode_vi(opc, vd, imm, vs2, true)); 710 tcg_out32(s, encode_vi(opc, vd, imm, vs2, false)); [all …]
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/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 748 tcg_out32(s, p); 799 tcg_out32(s, disp); 809 tcg_out32(s, offset); 818 tcg_out32(s, offset); 859 tcg_out32(s, offset); 897 tcg_out32(s, 0); 906 tcg_out32(s, 0); 1102 tcg_out32(s, arg); 1107 tcg_out32(s, arg); 1116 tcg_out32(s, diff); [all …]
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 382 tcg_out32(s, inst); 397 tcg_out32(s, inst); 413 tcg_out32(s, inst); 451 tcg_out32(s, inst); 464 tcg_out32(s, inst); 486 tcg_out32(s, inst); 492 tcg_out32(s, 0); 1586 tcg_out32(s, sync[a0 & TCG_MO_ALL]);
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/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 660 tcg_out32(s, (op << 16) | (r1 << 4) | r2); 667 tcg_out32(s, (op << 16) | (r3 << 12) | (r1 << 4) | r2); 674 tcg_out32(s, (op << 16) | (r3 << 12) | (m4 << 8) | (r1 << 4) | r2); 680 tcg_out32(s, (op << 16) | (m3 << 12) | (r1 << 4) | r2); 685 tcg_out32(s, (op << 16) | (r1 << 20) | (i2 & 0xffff)); 700 tcg_out32(s, (i2 << 16) | (op & 0xff)); 706 tcg_out32(s, i2); 712 tcg_out32(s, (op << 24) | (r1 << 20) | (r3 << 16) | (b2 << 12) 720 tcg_out32(s, (op & 0xff) | (b2 << 28) 774 tcg_out32(s, (op & 0x00ff) | RXB(v1, v2, 0, 0) | (m3 << 12));
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/qemu/tcg/ |
H A D | tcg.c | 301 static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v) in tcg_out32() function
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