Home
last modified time | relevance | path

Searched refs:tcg_gen_shri_i32 (Results 1 – 23 of 23) sorted by relevance

/qemu/target/sh4/
H A Dtranslate.c689 tcg_gen_shri_i32(low, REG(B11_8), 16); in _decode_opc()
714 tcg_gen_shri_i32(cpu_sr_t, cpu_sr_t, 31); in _decode_opc()
748 tcg_gen_shri_i32(cpu_sr_q, REG(B11_8), 31); /* SR_Q */ in _decode_opc()
749 tcg_gen_shri_i32(cpu_sr_m, REG(B7_4), 31); /* SR_M */ in _decode_opc()
761 tcg_gen_shri_i32(t0, REG(B11_8), 31); in _decode_opc()
907 tcg_gen_shri_i32(t2, t2, 1); in _decode_opc()
942 tcg_gen_shri_i32(cpu_sr_t, t1, 31); in _decode_opc()
1592 tcg_gen_shri_i32(cpu_sr_t, REG(B11_8), 31); in _decode_opc()
1602 tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 1); in _decode_opc()
1616 tcg_gen_shri_i32(cpu_sr_t, REG(B11_8), 31); in _decode_opc()
[all …]
/qemu/scripts/coccinelle/
H A Dtcg_gen_extract.cocci47 tcg_gen_shri_i32@shr_p
93 -tcg_gen_shri_i32@shr_p(ret, arg, ofs);
/qemu/tcg/
H A Dtcg-op.c484 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) in tcg_gen_shri_i32() function
850 tcg_gen_shri_i32(t1, arg1, 32 - arg2); in tcg_gen_rotli_i32()
978 tcg_gen_shri_i32(ret, arg, 32 - len); in tcg_gen_extract_i32()
994 tcg_gen_shri_i32(ret, ret, ofs); in tcg_gen_extract_i32()
1003 tcg_gen_shri_i32(ret, arg, ofs); in tcg_gen_extract_i32()
1008 tcg_gen_shri_i32(ret, ret, 32 - len); in tcg_gen_extract_i32()
1039 tcg_gen_shri_i32(ret, arg, ofs); in tcg_gen_sextract_i32()
1066 tcg_gen_shri_i32(t0, al, ofs); in tcg_gen_extract2_i32()
1286 tcg_gen_shri_i32(t0, arg, 8); /* t0 = ...a (IZ) .xxa (!IZ) */ in tcg_gen_bswap16_i32()
1324 tcg_gen_shri_i32(t0, arg, 8); /* t0 = .abc */ in tcg_gen_bswap32_i32()
[all …]
H A Dtcg-op-gvec.c2906 tcg_gen_shri_i32(d, a, c); in tcg_gen_vec_shr8i_i32()
2913 tcg_gen_shri_i32(d, a, c); in tcg_gen_vec_shr16i_i32()
2932 { .fni4 = tcg_gen_shri_i32, in tcg_gen_gvec_shri()
2988 tcg_gen_shri_i32(d, a, c); in tcg_gen_vec_sar8i_i32()
3002 tcg_gen_shri_i32(d, a, c); in tcg_gen_vec_sar16i_i32()
/qemu/target/ppc/translate/
H A Dfp-impl.c.inc23 tcg_gen_shri_i32(cpu_crf[1], tmp, 28);
638 tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
658 tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
694 tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
723 tcg_gen_shri_i32(cpu_crf[1], cpu_crf[1], FPSCR_OX);
H A Dspe-impl.c.inc100 GEN_SPEOP_TCG_LOGIC_IMM2(evsrwiu, tcg_gen_shri_i32);
/qemu/target/arm/tcg/
H A Dgengvec.c200 tcg_gen_shri_i32(a, a, shift); in gen_usra32_i32()
497 tcg_gen_shri_i32(d, a, sh); in gen_urshr32_i32()
596 tcg_gen_shri_i32(t, a, 31); in gen_ursra32_i32()
692 tcg_gen_shri_i32(a, a, shift); in gen_shr32_ins_i32()
2031 tcg_gen_shri_i32(a, a, 1); in gen_uhadd_i32()
2032 tcg_gen_shri_i32(b, b, 1); in gen_uhadd_i32()
2175 tcg_gen_shri_i32(a, a, 1); in gen_uhsub_i32()
2176 tcg_gen_shri_i32(b, b, 1); in gen_uhsub_i32()
2319 tcg_gen_shri_i32(a, a, 1); in gen_urhadd_i32()
2320 tcg_gen_shri_i32(b, b, 1); in gen_urhadd_i32()
H A Dtranslate.c427 tcg_gen_shri_i32(tmp, var, 8); in gen_rev16()
573 tcg_gen_shri_i32(cpu_CF, var, 31); in gen_arm_shift_im()
579 tcg_gen_shri_i32(var, var, shift); in gen_arm_shift_im()
601 tcg_gen_shri_i32(var, var, 1); in gen_arm_shift_im()
1871 tcg_gen_shri_i32(tmp, tmp, ((insn & 7) << 2) + 0); in disas_iwmmxt_insn()
1874 tcg_gen_shri_i32(tmp, tmp, ((insn & 3) << 3) + 4); in disas_iwmmxt_insn()
1877 tcg_gen_shri_i32(tmp, tmp, ((insn & 1) << 4) + 12); in disas_iwmmxt_insn()
2427 tcg_gen_shri_i32(tmp, tmp, 16); in disas_iwmmxt_insn()
2429 tcg_gen_shri_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
2475 tcg_gen_shri_i32(tmp, tmp, 16); in disas_dsp_insn()
[all …]
H A Dtranslate-neon.c1993 tcg_gen_shri_i32(tmp, var, 16); in gen_neon_dup_high16()
2867 tcg_gen_shri_i32(tmp, tmp, 16); in trans_VCVT_F32_F16()
2873 tcg_gen_shri_i32(tmp2, tmp2, 16); in trans_VCVT_F32_F16()
3262 tcg_gen_shri_i32(t1, t1, 8); in gen_neon_trn_u8()
3279 tcg_gen_shri_i32(t1, t1, 16); in gen_neon_trn_u16()
H A Dtranslate-m-nocp.c388 tcg_gen_shri_i32(sfpa, tmp, 31); in gen_M_fp_sysreg_write()
H A Dtranslate-vfp.c3417 tcg_gen_shri_i32(rm, rm, 16); in trans_VMOVX()
H A Dtranslate-a64.c2398 tcg_gen_shri_i32(tmp, cpu_VF, 31); in gen_get_nzcv()
2418 tcg_gen_shri_i32(cpu_CF, cpu_CF, 29); in gen_set_nzcv()
/qemu/target/riscv/insn_trans/
H A Dtrans_rvk.c.inc170 return gen_sha256(ctx, a, EXT_NONE, tcg_gen_shri_i32, 7, 18, 3);
176 return gen_sha256(ctx, a, EXT_NONE, tcg_gen_shri_i32, 17, 19, 10);
/qemu/target/m68k/
H A Dtranslate.c965 tcg_gen_shri_i32(tmp, tmp, 16); in gen_load_fp()
1646 tcg_gen_shri_i32(t0, t0, 3); in bcd_add()
1701 tcg_gen_shri_i32(t2, t0, 3); in bcd_sub()
2068 tcg_gen_shri_i32(dbuf, reg, (i - 1) * 8); in DISAS_INSN()
2644 tcg_gen_shri_i32(src2, reg, 16); in DISAS_INSN()
3355 tcg_gen_shri_i32(QREG_CC_C, reg, bits - count); in shift_im()
3375 tcg_gen_shri_i32(QREG_CC_C, reg, count - 1); in shift_im()
3377 tcg_gen_shri_i32(QREG_CC_N, reg, count); in shift_im()
3425 tcg_gen_shri_i32(QREG_CC_C, QREG_CC_N, bits); in shift_reg()
3469 tcg_gen_shri_i32(QREG_CC_C, QREG_CC_C, 31); in shift_reg()
[all …]
/qemu/target/rx/
H A Dtranslate.c1341 tcg_gen_shri_i32, tcg_gen_sari_i32, in shiftr_imm()
1362 tcg_gen_shri_i32, tcg_gen_sari_i32, in shiftr_reg()
1424 tcg_gen_shri_i32(tmp, cpu_regs[a->rd], 31); in trans_ROLC()
1439 tcg_gen_shri_i32(cpu_regs[a->rd], cpu_regs[a->rd], 1); in trans_RORC()
1467 tcg_gen_shri_i32(cpu_psw_c, cpu_regs[rd], 31); in rx_rot()
1516 tcg_gen_shri_i32(cpu_regs[a->rd], cpu_regs[a->rs], 8); in trans_REVW()
/qemu/target/microblaze/
H A Dtranslate.c387 DO_TYPEBI_CFG(bsrli, use_barrel, false, tcg_gen_shri_i32) in DO_TYPEA_CFG()
582 tcg_gen_shri_i32(out, ina, 1); in gen_srl()
1527 tcg_gen_shri_i32(tmp, cpu_msr, 1); in do_rti()
1538 tcg_gen_shri_i32(tmp, cpu_msr, 1); in do_rtb()
1548 tcg_gen_shri_i32(tmp, cpu_msr, 1); in do_rte()
/qemu/target/mips/tcg/
H A Dmxu_translate.c2221 tcg_gen_shri_i32(t0, t0, 16); in gen_mxu_D16MAX_D16MIN()
2255 tcg_gen_shri_i32(t0, t0, 16); in gen_mxu_D16MAX_D16MIN()
2317 tcg_gen_shri_i32(t0, t0, 8 * (3 - i)); in gen_mxu_Q8MAX_Q8MIN()
2356 tcg_gen_shri_i32(t0, t0, 8 * (3 - i)); in gen_mxu_Q8MAX_Q8MIN()
4136 tcg_gen_shri_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1], in gen_mxu_S32ALNI()
4152 tcg_gen_shri_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], 8 * optn3); in gen_mxu_S32ALNI()
4206 tcg_gen_shri_i32(t1, t1, 24); in gen_mxu_S32ALNI()
4229 tcg_gen_shri_i32(t1, t1, 16); in gen_mxu_S32ALNI()
4252 tcg_gen_shri_i32(t1, t1, 8); in gen_mxu_S32ALNI()
H A Dtranslate.c1242 tcg_gen_shri_i32(t2, t2, CP0SRSCtl_PSS); in gen_load_srsgpr()
1262 tcg_gen_shri_i32(t2, t2, CP0SRSCtl_PSS); in gen_store_srsgpr()
8693 tcg_gen_shri_i32(t0, fpu_fcr31, get_fp_bit(cc)); in gen_compute_branch1()
8699 tcg_gen_shri_i32(t0, fpu_fcr31, get_fp_bit(cc)); in gen_compute_branch1()
8705 tcg_gen_shri_i32(t0, fpu_fcr31, get_fp_bit(cc)); in gen_compute_branch1()
8710 tcg_gen_shri_i32(t0, fpu_fcr31, get_fp_bit(cc)); in gen_compute_branch1()
8719 tcg_gen_shri_i32(t0, fpu_fcr31, get_fp_bit(cc)); in gen_compute_branch1()
8720 tcg_gen_shri_i32(t1, fpu_fcr31, get_fp_bit(cc + 1)); in gen_compute_branch1()
8729 tcg_gen_shri_i32(t0, fpu_fcr31, get_fp_bit(cc)); in gen_compute_branch1()
8730 tcg_gen_shri_i32(t1, fpu_fcr31, get_fp_bit(cc + 1)); in gen_compute_branch1()
[all …]
/qemu/include/tcg/
H A Dtcg-op.h327 #define tcg_gen_shri_tl tcg_gen_shri_i32
H A Dtcg-op-common.h91 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
/qemu/target/xtensa/
H A Dtranslate.c550 (is_unsigned ? tcg_gen_shri_i32 : tcg_gen_sari_i32)(m, v, 16); in gen_mac16_m()
1345 tcg_gen_shri_i32(tmp, tmp, arg[1].imm + shift); in translate_all()
1439 tcg_gen_shri_i32(tmp1, arg[1].in, arg[1].imm); in translate_boolean()
1440 tcg_gen_shri_i32(tmp2, arg[2].in, arg[2].imm); in translate_boolean()
1573 tcg_gen_shri_i32(tmp, arg[1].in, arg[2].imm); in translate_extui()
2112 tcg_gen_shri_i32(tmp, cpu_SR[EXCVADDR], 10); in translate_rsr_ptevaddr()
2347 tcg_gen_shri_i32(arg[0].out, arg[1].in, arg[2].imm); in translate_srli()
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_vec.c.inc948 tcg_gen_shri_i32(t1, a, 16);
949 tcg_gen_shri_i32(t2, b, 16);
1110 tcg_gen_shri_i32(t1, a, 16);
1111 tcg_gen_shri_i32(t2, b, 16);
1281 tcg_gen_shri_i32(t1, a, 16);
2354 tcg_gen_shri_i32(t1, a, 16);
2355 tcg_gen_shri_i32(t2, b, 16);
2502 tcg_gen_shri_i32(t1, a, 16);
/qemu/target/ppc/
H A Dtranslate.c3857 tcg_gen_shri_i32(t0, cpu_crf[crbA(ctx->opcode) >> 2], sh); \
3865 tcg_gen_shri_i32(t1, cpu_crf[crbB(ctx->opcode) >> 2], sh); \
4189 tcg_gen_shri_i32(temp, temp, crn * 4); in gen_mtcrf()
4197 tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4); in gen_mtcrf()