/qemu/target/mips/tcg/ |
H A D | translate_addr_const.c | 29 tcg_gen_shli_tl(t0, t0, sa + 1); in gen_lsa() 50 tcg_gen_shli_tl(t0, t0, sa + 1); in gen_dlsa()
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H A D | mxu_translate.c | 770 tcg_gen_shli_tl(t1, t1, 8); in gen_mxu_s8ldd() 778 tcg_gen_shli_tl(t1, t1, 16); in gen_mxu_s8ldd() 1045 tcg_gen_shli_tl(t3, t3, 1); in gen_mxu_d16mul() 1046 tcg_gen_shli_tl(t2, t2, 1); in gen_mxu_d16mul() 1143 tcg_gen_shli_tl(t3, t3, 1); in gen_mxu_d16mac() 1144 tcg_gen_shli_tl(t2, t2, 1); in gen_mxu_d16mac() 1289 tcg_gen_shli_tl(t3, t3, 16); in gen_mxu_d16madl() 1604 tcg_gen_shli_tl(t1, t1, strd2); in gen_mxu_s32ldxvx() 1642 tcg_gen_shli_tl(t1, t1, strd2); in gen_mxu_lxx() 1673 tcg_gen_shli_tl(t1, t1, strd2); in gen_mxu_s32stxvx() [all …]
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H A D | translate.c | 1991 tcg_gen_shli_tl(t1, t1, 3); in gen_lxl() 2018 tcg_gen_shli_tl(t1, t1, 3); in gen_lxr() 2478 tcg_gen_shli_tl(t0, t0, uimm); in gen_shift_imm() 2505 tcg_gen_shli_tl(cpu_gpr[rt], t0, uimm); in gen_shift_imm() 2521 tcg_gen_shli_tl(cpu_gpr[rt], t0, uimm + 32); in gen_shift_imm() 4709 tcg_gen_shli_tl(t0, t0, 8); in gen_bshfl() 4729 tcg_gen_shli_tl(t0, t0, 8); in gen_bshfl() 4741 tcg_gen_shli_tl(t0, t0, 16); in gen_bshfl() 4744 tcg_gen_shli_tl(t0, t0, 32); in gen_bshfl() 4796 tcg_gen_shli_tl(t0, t0, bits); in gen_align_bits() [all …]
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H A D | nanomips_translate.c.inc | 1797 tcg_gen_shli_tl(cpu_gpr[ret], cpu_gpr[ret], 8 * rd); 2027 tcg_gen_shli_tl(v0_t, v0_t, 16); 2074 tcg_gen_shli_tl(t0, v0_t, 16); 2082 tcg_gen_shli_tl(t0, v0_t, 8); 2084 tcg_gen_shli_tl(t0, v0_t, 16); 2400 tcg_gen_shli_tl(t0, t0, 1); 2601 tcg_gen_shli_tl(t0, t0, 1); 2609 tcg_gen_shli_tl(t0, t0, 2); 2613 tcg_gen_shli_tl(t0, t0, 3);
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/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_shift.c.inc | 83 TRANS(slli_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_shli_tl) 84 TRANS(slli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
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H A D | trans_bit.c.inc | 123 tcg_gen_shli_tl(t1, t1, 8); 136 tcg_gen_shli_tl(t1, t1, 8); 162 tcg_gen_shli_tl(t0, t0, 16);
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H A D | trans_arith.c.inc | 192 tcg_gen_shli_tl(t0, src1, sa);
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/qemu/target/tricore/ |
H A D | translate.c | 511 tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31); in gen_madd32_d() 575 tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31); in gen_maddu64_d() 879 tcg_gen_shli_tl(temp, r1, 16); in gen_maddr32_h() 905 tcg_gen_shli_tl(temp, r1, 16); in gen_maddsur32_h() 940 tcg_gen_shli_tl(temp, r1, 16); in gen_maddr32s_h() 966 tcg_gen_shli_tl(temp, r1, 16); in gen_maddsur32s_h() 1011 tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31); in gen_madd32_q() 1019 tcg_gen_shli_tl(temp, temp, 31); in gen_madd32_q() 1043 tcg_gen_shli_tl(temp, temp, 1); in gen_m16add32_q() 1060 tcg_gen_shli_tl(temp, temp, 1); in gen_m16adds32_q() [all …]
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/qemu/target/avr/ |
H A D | translate.c | 814 tcg_gen_shli_tl(R, R, 1); in trans_FMUL() 849 tcg_gen_shli_tl(R, R, 1); in trans_FMULS() 882 tcg_gen_shli_tl(R, R, 1); in trans_FMULSU() 1591 tcg_gen_shli_tl(addr, addr, 16); in trans_LDS() 1795 tcg_gen_shli_tl(addr, addr, 16); in trans_STS() 1990 tcg_gen_shli_tl(addr, H, 8); /* addr = H:L */ in trans_LPM1() 2007 tcg_gen_shli_tl(addr, H, 8); /* addr = H:L */ in trans_LPM2() 2024 tcg_gen_shli_tl(addr, H, 8); /* addr = H:L */ in trans_LPMX() 2354 tcg_gen_shli_tl(t0, cpu_Cf, 7); in trans_ROR() 2402 tcg_gen_shli_tl(t0, t0, 4); in trans_SWAP() [all …]
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/qemu/include/tcg/ |
H A D | tcg-op.h | 204 #define tcg_gen_shli_tl tcg_gen_shli_i64 macro 325 #define tcg_gen_shli_tl tcg_gen_shli_i32
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/qemu/target/riscv/insn_trans/ |
H A D | trans_rvb.c.inc | 65 tcg_gen_shli_tl(t, arg1, 32); 341 tcg_gen_shli_tl(t, arg1, SHAMT); \ 428 tcg_gen_shli_tl(t, t, SHAMT); \
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H A D | trans_rvi.c.inc | 630 tcg_gen_shli_tl(reth, src1l, shamt - 64); 634 tcg_gen_shli_tl(retl, src1l, shamt); 640 return gen_shift_imm_fn(ctx, a, EXT_NONE, tcg_gen_shli_tl, gen_slli_i128); 834 return gen_shift_imm_fn(ctx, a, EXT_NONE, tcg_gen_shli_tl, NULL); 855 return gen_shift_imm_fn(ctx, a, EXT_NONE, tcg_gen_shli_tl, NULL);
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H A D | trans_xthead.c.inc | 98 tcg_gen_shli_tl(offs, offs, imm2); 100 tcg_gen_shli_tl(offs, src2, imm2); 118 tcg_gen_shli_tl(t, arg2, SHAMT); \
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H A D | trans_rvv.c.inc | 953 tcg_gen_shli_tl(i_esz, i, s->sew); 965 tcg_gen_shli_tl(mask_offs, k, get_log2(max_elems << s->sew)); 992 tcg_gen_shli_tl(mask_offs, mask_offs, s->sew); 1004 tcg_gen_shli_tl(k_esz, k, s->sew); 1008 tcg_gen_shli_tl(k_max, k, get_log2(max_elems)); 1010 tcg_gen_shli_tl(dest_offs, dest_offs, s->sew); 1072 tcg_gen_shli_tl(tail_cnt, cpu_vl, s->sew);
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/qemu/target/ppc/ |
H A D | translate.c | 512 tcg_gen_shli_tl(t1, t0, 8); /* Duplicate the bit in TS */ in spr_write_CTRL_ST() 568 tcg_gen_shli_tl(t0, cpu_so, XER_SO); in spr_read_xer() 569 tcg_gen_shli_tl(t1, cpu_ov, XER_OV); in spr_read_xer() 570 tcg_gen_shli_tl(t2, cpu_ca, XER_CA); in spr_read_xer() 575 tcg_gen_shli_tl(t0, cpu_ov32, XER_OV32); in spr_read_xer() 577 tcg_gen_shli_tl(t0, cpu_ca32, XER_CA32); in spr_read_xer() 1243 tcg_gen_shli_tl(mas7, mas7, 32); in spr_read_mas73() 2310 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x3a); in gen_slw() 2313 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1a); in gen_slw() 2374 tcg_gen_shli_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x3a); in gen_srw() [all …]
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/qemu/target/ppc/translate/ |
H A D | spe-impl.c.inc | 629 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16); 635 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16); 645 tcg_gen_shli_tl(t0, t0, 16); 670 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16); 673 tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)], t0, 16); 702 tcg_gen_shli_tl(cpu_gprh[rD(ctx->opcode)], t0, 16); 706 tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)], t0, 16);
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/qemu/target/hexagon/ |
H A D | macros.h | 337 tcg_gen_shli_tl(result, result, shift); in gen_read_ireg() 431 tcg_gen_shli_tl(tmp, REG2, SCALE); \ 436 tcg_gen_shli_tl(EA, REG, SCALE); \
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H A D | genptr.c | 1019 tcg_gen_shli_tl(ovf, ovf, reg_field_info[USR_OVF].offset); in gen_shl_sat() 1328 tcg_gen_shli_tl(tmp, tmp, reg_field_info[field].offset); in gen_set_usr_field_if()
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/qemu/target/i386/tcg/ |
H A D | translate.c | 1477 tcg_gen_shli_tl(dshift, dshift, ot); in do_gen_string() 1846 tcg_gen_shli_tl(s->A0, cpu_regs[a.index], a.scale); in gen_lea_modrm_1() 2023 tcg_gen_shli_tl(cpu_seg_base[seg_reg], selector, 4); in gen_op_movl_seg_real()
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/qemu/target/sparc/ |
H A D | translate.c | 717 tcg_gen_shli_tl(dst, dst, 1); in gen_op_array16() 723 tcg_gen_shli_tl(dst, dst, 2); in gen_op_array32() 836 tcg_gen_shli_tl(shift, shift, 3); in gen_op_faligndata_i() 4171 tcg_gen_shli_tl(dst, src1, a->i); in TRANS()
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/qemu/target/openrisc/ |
H A D | translate.c | 893 tcg_gen_shli_tl(cpu_R(dc, a->d), cpu_R(dc, a->a), in trans_l_slli()
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