/qemu/target/riscv/insn_trans/ |
H A D | trans_rvm.c.inc | 80 tcg_gen_sari_tl(t0h, rs1h, 63); 83 tcg_gen_sari_tl(t1h, rs2h, 63); 100 tcg_gen_sari_tl(ret, ret, 32); 118 tcg_gen_sari_tl(t0h, rs1h, 63); 131 tcg_gen_sari_tl(rl, arg1, TARGET_LONG_BITS - 1); 144 tcg_gen_sari_tl(ret, ret, 32);
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H A D | trans_rvzacas.c.inc | 59 tcg_gen_sari_tl(cpu_gprh[reg_num], cpu_gpr[reg_num], 63); 60 tcg_gen_sari_tl(cpu_gprh[reg_num + 1], cpu_gpr[reg_num + 1], 63);
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H A D | trans_rvi.c.inc | 386 tcg_gen_sari_tl(desth, destl, 63); 677 tcg_gen_sari_tl(retl, src1h, shamt - 64); 678 tcg_gen_sari_tl(reth, src1h, 63); 681 tcg_gen_sari_tl(reth, src1h, shamt); 688 tcg_gen_sari_tl, gen_sraiw, gen_srai_i128); 797 tcg_gen_sari_tl(lr, src1h, 63); 869 return gen_shift_imm_fn(ctx, a, EXT_NONE, tcg_gen_sari_tl, NULL);
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/qemu/target/tricore/ |
H A D | translate.c | 141 tcg_gen_sari_tl(arg00, arg0, 16); \ 152 tcg_gen_sari_tl(arg00, arg0, 16); \ 154 tcg_gen_sari_tl(arg11, arg1, 16); \ 164 tcg_gen_sari_tl(arg00, arg0, 16); \ 166 tcg_gen_sari_tl(arg10, arg1, 16); \ 175 tcg_gen_sari_tl(arg01, arg0, 16); \ 177 tcg_gen_sari_tl(arg11, arg1, 16); \ 2173 tcg_gen_sari_tl(low, low, 31); in gen_mul_i32s() 2502 tcg_gen_sari_tl(ret, r1, 31); in gen_shaci() 2529 tcg_gen_sari_tl(ret, r1, -shift_count); in gen_shaci() [all …]
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/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_shift.c.inc | 88 TRANS(srai_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
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/qemu/include/tcg/ |
H A D | tcg-op.h | 208 #define tcg_gen_sari_tl tcg_gen_sari_i64 macro 329 #define tcg_gen_sari_tl tcg_gen_sari_i32
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/qemu/target/mips/tcg/ |
H A D | mxu_translate.c | 1870 tcg_gen_sari_tl(t0, t0, sft4); in gen_mxu_d32sxx() 1871 tcg_gen_sari_tl(t1, t1, sft4); in gen_mxu_d32sxx() 2013 tcg_gen_sari_tl(t0, t0, sft4); in gen_mxu_q16sxx() 2014 tcg_gen_sari_tl(t1, t1, sft4); in gen_mxu_q16sxx() 2015 tcg_gen_sari_tl(t2, t2, sft4); in gen_mxu_q16sxx() 2016 tcg_gen_sari_tl(t3, t3, sft4); in gen_mxu_q16sxx() 3832 tcg_gen_sari_tl(t0, mxu_gpr[XRb - 1], 16); in gen_mxu_Q16SAT() 3844 tcg_gen_sari_tl(t1, t1, 16); in gen_mxu_Q16SAT() 3868 tcg_gen_sari_tl(t0, mxu_gpr[XRc - 1], 16); in gen_mxu_Q16SAT() 3880 tcg_gen_sari_tl(t1, t1, 16); in gen_mxu_Q16SAT()
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H A D | translate.c | 2482 tcg_gen_sari_tl(cpu_gpr[rt], t0, uimm); in gen_shift_imm() 2508 tcg_gen_sari_tl(cpu_gpr[rt], t0, uimm); in gen_shift_imm() 2524 tcg_gen_sari_tl(cpu_gpr[rt], t0, uimm + 32); in gen_shift_imm()
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/qemu/target/ppc/ |
H A D | translate.c | 2311 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_slw() 2314 tcg_gen_sari_tl(t0, t0, 0x1f); in gen_slw() 2353 tcg_gen_sari_tl(t0, dst, TARGET_LONG_BITS - 1); in gen_srawi() 2359 tcg_gen_sari_tl(dst, dst, sh); in gen_srawi() 2375 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_srw() 2378 tcg_gen_sari_tl(t0, t0, 0x1f); in gen_srw() 2399 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_sld() 2434 tcg_gen_sari_tl(t0, src, TARGET_LONG_BITS - 1); in gen_sradi() 2440 tcg_gen_sari_tl(dst, src, sh); in gen_sradi() 2489 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_srd() [all …]
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/qemu/target/openrisc/ |
H A D | translate.c | 253 tcg_gen_sari_tl(t0, dest, TARGET_LONG_BITS - 1); in gen_mul() 909 tcg_gen_sari_tl(cpu_R(dc, a->d), cpu_R(dc, a->a), in trans_l_srai()
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/qemu/target/hexagon/ |
H A D | macros.h | 334 tcg_gen_sari_tl(msb, val, 21); in gen_read_ireg()
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/qemu/target/riscv/ |
H A D | translate.c | 402 tcg_gen_sari_tl(cpu_gprh[reg_num], cpu_gpr[reg_num], 63); in gen_set_gpr()
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/qemu/target/sparc/ |
H A D | translate.c | 4175 tcg_gen_sari_tl(dst, src1, a->i); in TRANS()
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/qemu/target/i386/tcg/ |
H A D | emit.c.inc | 2129 tcg_gen_sari_tl(s->T1, s->T0, TARGET_LONG_BITS - 1);
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