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Searched refs:tcg_gen_mov_i32 (Results 1 – 21 of 21) sorted by relevance

/qemu/target/rx/
H A Dtranslate.c329 tcg_gen_mov_i32(ret, cpu_sp); in move_from_cr()
331 tcg_gen_mov_i32(ret, cpu_usp); in move_from_cr()
335 tcg_gen_mov_i32(ret, cpu_fpsw); in move_from_cr()
338 tcg_gen_mov_i32(ret, cpu_bpsw); in move_from_cr()
341 tcg_gen_mov_i32(ret, cpu_bpc); in move_from_cr()
345 tcg_gen_mov_i32(ret, cpu_isp); in move_from_cr()
347 tcg_gen_mov_i32(ret, cpu_sp); in move_from_cr()
351 tcg_gen_mov_i32(ret, cpu_fintv); in move_from_cr()
354 tcg_gen_mov_i32(ret, cpu_intb); in move_from_cr()
383 tcg_gen_mov_i32(cpu_sp, val); in move_to_cr()
[all …]
/qemu/target/sh4/
H A Dtranslate.c256 tcg_gen_mov_i32(cpu_pc, cpu_delayed_pc); in gen_jump()
304 tcg_gen_mov_i32(ds, cpu_delayed_cond); in gen_delayed_conditional_jump()
435 tcg_gen_mov_i32(cpu_delayed_pc, cpu_pr); in _decode_opc()
457 tcg_gen_mov_i32(cpu_delayed_pc, cpu_spc); in _decode_opc()
559 tcg_gen_mov_i32(REG(B11_8), REG(B7_4)); in _decode_opc()
589 tcg_gen_mov_i32(REG(B11_8), addr); /* modify register status */ in _decode_opc()
598 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
607 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc()
715 tcg_gen_mov_i32(Rn, result); in _decode_opc()
943 tcg_gen_mov_i32(Rn, result); in _decode_opc()
[all …]
/qemu/target/m68k/
H A Dtranslate.c142 tcg_gen_mov_i32(s->writeback[regno], val); in delay_set_areg()
151 tcg_gen_mov_i32(tmp, val); in delay_set_areg()
163 tcg_gen_mov_i32(cpu_aregs[regno], s->writeback[regno]); in do_writebacks()
260 tcg_gen_mov_i32(QREG_PC, dest); in gen_jmp()
544 tcg_gen_mov_i32(QREG_CC_C, QREG_CC_X); in gen_flush_flags()
545 tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); in gen_flush_flags()
559 tcg_gen_mov_i32(QREG_CC_C, QREG_CC_X); in gen_flush_flags()
560 tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); in gen_flush_flags()
582 tcg_gen_mov_i32(QREG_CC_N, QREG_CC_Z); in gen_flush_flags()
586 tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); in gen_flush_flags()
[all …]
/qemu/tcg/
H A Dtcg-op.c333 void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg) in tcg_gen_mov_i32() function
342 tcg_gen_mov_i32(ret, tcg_constant_i32(arg)); in tcg_gen_movi_i32()
354 tcg_gen_mov_i32(ret, arg1); in tcg_gen_addi_i32()
397 tcg_gen_mov_i32(ret, arg1); in tcg_gen_andi_i32()
430 tcg_gen_mov_i32(ret, arg1); in tcg_gen_ori_i32()
445 tcg_gen_mov_i32(ret, arg1); in tcg_gen_xori_i32()
473 tcg_gen_mov_i32(ret, arg1); in tcg_gen_shli_i32()
488 tcg_gen_mov_i32(ret, arg1); in tcg_gen_shri_i32()
503 tcg_gen_mov_i32(ret, arg1); in tcg_gen_sari_i32()
839 tcg_gen_mov_i32(ret, arg1); in tcg_gen_rotli_i32()
[all …]
H A Dtcg-op-ldst.c757 tcg_gen_mov_i32(ret, val); in tcg_gen_ext_i32()
845 tcg_gen_mov_i32(retv, t1); in tcg_gen_nonatomic_cmpxchg_i32_int()
1261 tcg_gen_mov_i32(r, b); in tcg_gen_mov2_i32()
H A Dtcg-op-gvec.c414 tcg_gen_mov_i32(out, in); in tcg_gen_dup_i32()
/qemu/include/tcg/
H A Dtcg-op.h298 #define tcg_gen_mov_tl tcg_gen_mov_i32
343 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
345 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
346 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
353 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
354 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
H A Dtcg-op-common.h162 void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg);
530 tcg_gen_mov_i32((NAT)r, a); in tcg_gen_ext_i32_ptr()
557 tcg_gen_mov_i32(r, (NAT)a); in tcg_gen_trunc_ptr_i32()
/qemu/target/xtensa/
H A Dtranslate.c363 tcg_gen_mov_i32(cpu_pc, dest); in gen_jump_slot()
365 tcg_gen_mov_i32(cpu_SR[ICOUNT], dc->next_icount); in gen_jump_slot()
1068 tcg_gen_mov_i32(temp, arg_copy[i].arg->in); in disas_xtensa_insn()
1186 tcg_gen_mov_i32(dc->next_icount, cpu_SR[ICOUNT]); in xtensa_tr_translate_insn()
1196 tcg_gen_mov_i32(cpu_SR[ICOUNT], dc->next_icount); in xtensa_tr_translate_insn()
1472 tcg_gen_mov_i32(tmp, arg[0].in); in translate_callx0()
1482 tcg_gen_mov_i32(tmp, arg[0].in); in translate_callxw()
1584 tcg_gen_mov_i32(arg[0].out, tmp); in translate_getex()
1654 tcg_gen_mov_i32(addr, arg[1].in); in translate_l32ex()
1658 tcg_gen_mov_i32(cpu_exclusive_addr, addr); in translate_l32ex()
[all …]
/qemu/target/arm/tcg/
H A Dtranslate.c279 tcg_gen_mov_i32(var, cpu_R[reg]); in load_reg_var()
321 tcg_gen_mov_i32(cpu_R[reg], var); in store_reg()
419 tcg_gen_mov_i32(a, tmp1); in gen_smul_dual()
461 tcg_gen_mov_i32(cpu_NF, var); in gen_logic_CC()
462 tcg_gen_mov_i32(cpu_ZF, var); in gen_logic_CC()
486 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_add_CC()
490 tcg_gen_mov_i32(dest, cpu_NF); in gen_add_CC()
500 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_adc_CC()
504 tcg_gen_mov_i32(dest, cpu_NF); in gen_adc_CC()
512 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_sub_CC()
[all …]
H A Dtranslate-neon.c3266 tcg_gen_mov_i32(t0, rd); in gen_neon_trn_u8()
3282 tcg_gen_mov_i32(t0, rd); in gen_neon_trn_u16()
H A Dtranslate-a64.c951 tcg_gen_mov_i32(cpu_NF, cpu_ZF); in gen_logic_CC()
990 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_add32_CC()
1039 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_sub32_CC()
1099 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_adc_CC()
8549 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in do_setf()
8736 tcg_gen_mov_i32,
8737 tcg_gen_mov_i32,
H A Dtranslate-vfp.c2414 DO_VFP_VMOV(VMOV_reg, sp, tcg_gen_mov_i32) in DO_VFP_VMOV() argument
H A Dtranslate-sve.c519 tcg_gen_mov_i32(cpu_NF, t); in do_pred_flags()
1675 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in do_predset()
/qemu/target/microblaze/
H A Dtranslate.c574 tcg_gen_mov_i32(tmp, cpu_msr_c); in gen_src()
863 tcg_gen_mov_i32(cpu_R[arg->rd], cpu_res_val); in trans_lwx()
1124 tcg_gen_mov_i32(cpu_bvalue, reg_for_read(dc, ra)); in DO_BR()
1171 tcg_gen_mov_i32(cpu_pc, reg_for_read(dc, arg->rb)); in DO_BCC()
1739 tcg_gen_mov_i32(cpu_pc, cpu_btarget); in mb_tr_tb_stop()
1758 tcg_gen_mov_i32(tmp, cpu_bvalue); in mb_tr_tb_stop()
1770 tcg_gen_mov_i32(cpu_pc, cpu_btarget); in mb_tr_tb_stop()
/qemu/target/mips/tcg/
H A Dmxu_translate.c1752 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32AND()
1782 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32OR()
1785 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32OR()
1788 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32OR()
1818 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32XOR()
1821 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32XOR()
2155 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32MAX_S32MIN()
2226 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_D16MAX_D16MIN()
2324 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_Q8MAX_Q8MIN()
4140 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32ALNI()
[all …]
/qemu/target/hexagon/idef-parser/
H A DREADME.rst33 tcg_gen_mov_i32(RdV, tmp_0);
98 tcg_gen_mov_i32(RdV, tmp_0);
519 tcg_gen_mov_i32(RdV, tmp_0);
695 tcg_gen_mov_i32(RdV, tmp_0);
/qemu/target/ppc/
H A Dtranslate.c3861 tcg_gen_mov_i32(t0, cpu_crf[crbA(ctx->opcode) >> 2]); \
3869 tcg_gen_mov_i32(t1, cpu_crf[crbB(ctx->opcode) >> 2]); \
3897 tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]); in gen_mcrf()
4079 tcg_gen_mov_i32(t0, cpu_crf[0]); in gen_mfcr()
/qemu/target/sparc/
H A Dtranslate.c1306 tcg_gen_mov_i32(dst, src); in gen_op_fmovs()
4759 TRANS(FSRCs, VIS1, do_ff, a, tcg_gen_mov_i32) in TRANS()
/qemu/target/hppa/
H A Dtranslate.c4081 tcg_gen_mov_i32(dst, src); in gen_fcpy_f()
/qemu/target/i386/tcg/
H A Ddecode-new.c.inc2883 tcg_gen_mov_i32(cpu_cc_op, decode.cc_op_dynamic);