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Searched refs:tcg_gen_extr_i64_i32 (Results 1 – 12 of 12) sorted by relevance

/qemu/target/tricore/
H A Dtranslate.c187 tcg_gen_extr_i64_i32(rl, rh, ret); \
194 tcg_gen_extr_i64_i32(rl, rh, ret); \
250 tcg_gen_extr_i64_i32(rl, rh, temp); in gen_ld_2regs_64()
570 tcg_gen_extr_i64_i32(ret_low, ret_high, t2); in gen_maddu64_d()
623 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_madd_h()
650 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_maddsu_h()
685 tcg_gen_extr_i64_i32(ret_low, ret_high, temp64_2); in gen_maddsum_h()
714 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_madds_h()
751 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_maddsus_h()
791 tcg_gen_extr_i64_i32(ret_low, ret_high, temp64); in gen_maddsums_h()
[all …]
/qemu/target/riscv/insn_trans/
H A Dtrans_rvzacas.c.inc52 tcg_gen_extr_i64_i32(cpu_gpr[reg_num], cpu_gpr[reg_num + 1], t);
/qemu/include/tcg/
H A Dtcg-op.h361 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
H A Dtcg-op-common.h305 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
/qemu/target/m68k/
H A Dtranslate.c3420 tcg_gen_extr_i64_i32(QREG_CC_N, QREG_CC_C, t64); in shift_reg()
3466 tcg_gen_extr_i64_i32(QREG_CC_C, QREG_CC_N, t64); in shift_reg()
3688 tcg_gen_extr_i64_i32(lo, hi, t0); in rotate32_x()
3701 tcg_gen_extr_i64_i32(lo, hi, t0); in rotate32_x()
4005 tcg_gen_extr_i64_i32(dest, QREG_CC_N, tmp); in DISAS_INSN()
4130 tcg_gen_extr_i64_i32(DREG(ext, 12), QREG_CC_N, t64); in DISAS_INSN()
/qemu/tcg/
H A Dtcg-op.c1171 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_mulu2_i32()
1213 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_muls2_i32()
1240 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_mulsu2_i32()
3150 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg) in tcg_gen_extr_i64_i32() function
/qemu/target/arm/tcg/
H A Dtranslate.c3278 tcg_gen_extr_i64_i32(tmp2, tmp, t64); in gen_load_exclusive()
3280 tcg_gen_extr_i64_i32(tmp, tmp2, t64); in gen_load_exclusive()
5027 tcg_gen_extr_i64_i32(tmp2, tmp, t64); in do_ldrd_load()
5029 tcg_gen_extr_i64_i32(tmp, tmp2, t64); in do_ldrd_load()
6092 tcg_gen_extr_i64_i32(t1, t2, p64); in op_smlad()
H A Dtranslate-a64.c940 tcg_gen_extr_i64_i32(cpu_ZF, cpu_NF, result); in gen_set_NZ64()
9634 tcg_gen_extr_i64_i32(tcg_lo, tcg_hi, n); in TRANS()
/qemu/target/riscv/
H A Dtranslate.c547 tcg_gen_extr_i64_i32(cpu_gpr[reg_num], cpu_gpr[reg_num + 1], t); in gen_set_fpr_d()
/qemu/target/openrisc/
H A Dtranslate.c1291 tcg_gen_extr_i64_i32(cpu_R(dc, r + 1 + p), cpu_R(dc, r), t); in save_pair()
/qemu/target/sh4/
H A Dtranslate.c341 tcg_gen_extr_i64_i32(cpu_fregs[reg + 1], cpu_fregs[reg], t); in gen_store_fpr64()
/qemu/target/sparc/
H A Dtranslate.c4675 tcg_gen_extr_i64_i32(lo, hi, t64); in do_ldxfsr()