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Searched refs:tcg_gen_deposit_tl (Results 1 – 16 of 16) sorted by relevance

/qemu/target/mips/tcg/
H A Dmxu_translate.c742 tcg_gen_deposit_tl(t0, t0, t1, 0, 8); in gen_mxu_s8ldd()
748 tcg_gen_deposit_tl(t0, t0, t1, 8, 8); in gen_mxu_s8ldd()
754 tcg_gen_deposit_tl(t0, t0, t1, 16, 8); in gen_mxu_s8ldd()
760 tcg_gen_deposit_tl(t0, t0, t1, 24, 8); in gen_mxu_s8ldd()
765 tcg_gen_deposit_tl(t0, t1, t1, 16, 16); in gen_mxu_s8ldd()
771 tcg_gen_deposit_tl(t0, t1, t1, 16, 16); in gen_mxu_s8ldd()
784 tcg_gen_deposit_tl(t1, t1, t1, 8, 8); in gen_mxu_s8ldd()
785 tcg_gen_deposit_tl(t0, t1, t1, 16, 16); in gen_mxu_s8ldd()
876 tcg_gen_deposit_tl(t0, t0, t1, 0, 16); in gen_mxu_s16ldd()
882 tcg_gen_deposit_tl(t0, t0, t1, 16, 16); in gen_mxu_s16ldd()
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H A Dnanomips_translate.c.inc3059 tcg_gen_deposit_tl(cpu_dspctrl, cpu_dspctrl, v1_t, 24, 4);
3065 tcg_gen_deposit_tl(cpu_dspctrl, cpu_dspctrl, v1_t, 24, 4);
3071 tcg_gen_deposit_tl(cpu_dspctrl, cpu_dspctrl, v1_t, 24, 4);
3391 tcg_gen_deposit_tl(cpu_gpr[rt], t0, cpu_gpr[rt], rd, 32 - rd);
H A Dtranslate.c4662 tcg_gen_deposit_tl(t0, t0, t1, lsb, msb - lsb + 1); in gen_bitops()
4677 tcg_gen_deposit_tl(t0, t0, t1, lsb, msb - lsb + 1); in gen_bitops()
5196 tcg_gen_deposit_tl(tmp, tmp, arg, 30, 2); in gen_mfc0()
5253 tcg_gen_deposit_tl(tmp, tmp, arg, 30, 2); in gen_mfc0()
12687 tcg_gen_deposit_tl(cpu_gpr[rt], t0, cpu_gpr[rt], sa, 32 - sa); in gen_mipsdsp_append()
12721 tcg_gen_deposit_tl(cpu_gpr[rt], t0, cpu_gpr[rt], sa, 64 - sa); in gen_mipsdsp_append()
/qemu/target/avr/
H A Dtranslate.c359 tcg_gen_deposit_tl(Rd, RdL, RdH, 8, 8); /* Rd = RdH:RdL */ in trans_ADIW()
506 tcg_gen_deposit_tl(Rd, RdL, RdH, 8, 8); /* Rd = RdH:RdL */ in trans_SBIW()
926 tcg_gen_deposit_tl(cpu_pc, cpu_r[30], cpu_r[31], 8, 8); in gen_jmp_ez()
933 tcg_gen_deposit_tl(cpu_pc, cpu_r[30], cpu_r[31], 8, 8); in gen_jmp_z()
980 tcg_gen_deposit_tl(ret, lo, hi, 8, 16); in gen_pop_ret()
1464 tcg_gen_deposit_tl(addr, M, H, 8, 8); in gen_get_addr()
1465 tcg_gen_deposit_tl(addr, L, addr, 8, 16); in gen_get_addr()
/qemu/include/tcg/
H A Dtcg-op.h258 #define tcg_gen_deposit_tl tcg_gen_deposit_i64 macro
377 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
/qemu/target/riscv/insn_trans/
H A Dtrans_rvb.c.inc501 tcg_gen_deposit_tl(ret, src1, src2,
511 tcg_gen_deposit_tl(ret, src1, t, 8, TARGET_LONG_BITS - 8);
519 tcg_gen_deposit_tl(ret, src1, t, 16, TARGET_LONG_BITS - 16);
/qemu/target/hexagon/
H A Dgenptr.c157 tcg_gen_deposit_tl(control_reg, control_reg, hex_pred[i], i * 8, 8); in gen_read_p3_0()
313 tcg_gen_deposit_tl(result, result, src, N * 16, 16); in gen_set_half()
509 tcg_gen_deposit_tl(usr, usr, val, in gen_set_usr_field()
1157 tcg_gen_deposit_tl(RdV, RdV, tmp32, i * 16, 16); in gen_asr_r_svw_trun()
1170 tcg_gen_deposit_tl(RdV, RdV, tmp32, i * 16, 16); in gen_asr_r_svw_trun()
H A Dgen_tcg.h686 tcg_gen_deposit_tl(PeV, PeV, tmp, i, 1); \
1195 tcg_gen_deposit_tl(RxV, RxV, RsV, offset, width); \
H A Dmacros.h335 tcg_gen_deposit_tl(result, msb, lsb, 0, 7); in gen_read_ireg()
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_arith.c.inc206 tcg_gen_deposit_tl(dest, src1, src2, 32, 32);
222 tcg_gen_deposit_tl(dest, src1, src2, 52, 12);
H A Dtrans_bit.c.inc41 tcg_gen_deposit_tl(dest, src1, src2, a->ls, a->ms - a->ls + 1);
/qemu/target/i386/tcg/
H A Dtranslate.c449 tcg_gen_deposit_tl(dest, cpu_regs[reg - 4], t0, 8, 8); in gen_op_deposit_reg_v()
453 tcg_gen_deposit_tl(dest, cpu_regs[reg], t0, 0, 8); in gen_op_deposit_reg_v()
457 tcg_gen_deposit_tl(dest, cpu_regs[reg], t0, 0, 16); in gen_op_deposit_reg_v()
1600 tcg_gen_deposit_tl(tmp, s->T0, s->T1, 16, 16); in gen_shiftd_rm_T1()
1604 tcg_gen_deposit_tl(s->T1, s->T0, s->T1, 16, 16); in gen_shiftd_rm_T1()
H A Demit.c.inc1306 tcg_gen_deposit_tl(s->T1, s->T0, s->T1, 0, 2);
1310 tcg_gen_deposit_tl(flags, flags, zf, ctz32(CC_Z), 1);
1834 tcg_gen_deposit_tl(cpu_cc_src, cpu_cc_src, t0, ctz32(CC_Z), 1);
1896 tcg_gen_deposit_tl(cpu_cc_src, cpu_cc_src, Z, ctz32(CC_Z), 1);
2348 tcg_gen_deposit_tl(cpu_regs[R_EAX], cpu_regs[R_EAX], s->T0, 8, 8);
3036 tcg_gen_deposit_tl(s->T0, t, s->T0, 8, TARGET_LONG_BITS - 8);
3473 tcg_gen_deposit_tl(high, cin, s->T0, 1, TARGET_LONG_BITS - 1);
3524 tcg_gen_deposit_tl(high, cin, s->T0, 1, TARGET_LONG_BITS - 1);
/qemu/target/tricore/
H A Dtranslate.c2483 tcg_gen_deposit_tl(ret, ret, temp_low, 0, 16); in gen_sh_hi()
2562 tcg_gen_deposit_tl(ret, ret, low, 0, 16); in gen_sha_hi()
2570 tcg_gen_deposit_tl(ret, ret, low, 0, 16); in gen_sha_hi()
2634 tcg_gen_deposit_tl(ret, ret, temp1, 0, 1); in gen_bit_2op()
2667 tcg_gen_deposit_tl(ret, ret, temp, 0, 1); in gen_accumulating_cond()
4049 tcg_gen_deposit_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], temp, pos1, 1); in decode_bit_insert()
5313 tcg_gen_deposit_tl(cpu_gpr_d[r2], cpu_gpr_d[r1], temp, pos, width); in decode_rcpw_insert()
6567 tcg_gen_deposit_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2], in decode_rrpw_extract_insert()
7980 tcg_gen_deposit_tl(cpu_ICR, cpu_ICR, cpu_gpr_d[r1], in decode_sys_interrupts()
/qemu/target/ppc/
H A Dtranslate.c1286 tcg_gen_deposit_tl(spr, spr, cpu_gpr[gprn], 32, 32); in spr_write_prev_upper32()
1455 tcg_gen_deposit_tl(t0, t0, cpu_gpr[gprn], 32, 32); in spr_write_ppr32()
2009 tcg_gen_deposit_tl(t_ra, t_ra, t_rs, sh, me - mb + 1); in gen_rlwimi()
2283 tcg_gen_deposit_tl(t_ra, t_ra, t_rs, sh, me - mb + 1); in gen_rldimi()
/qemu/target/sparc/
H A Dtranslate.c547 tcg_gen_deposit_tl(cpu_y, t0, src1, 31, 1); in gen_op_mulscc()
4072 tcg_gen_deposit_tl(cpu_gsr, cpu_gsr, tmp, 0, 3); in TRANS()
4086 tcg_gen_deposit_tl(cpu_gsr, cpu_gsr, tmp, 0, 3); in gen_op_alignaddrl()
4099 tcg_gen_deposit_tl(cpu_gsr, cpu_gsr, dst, 32, 32); in TRANS()