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Searched refs:tcg_gen_and_i32 (Results 1 – 19 of 19) sorted by relevance

/qemu/tcg/
H A Dtcg-op.c384 void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) in tcg_gen_and_i32() function
416 tcg_gen_and_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_andi_i32()
656 tcg_gen_and_i32(ret, arg1, t0); in tcg_gen_andc_i32()
676 tcg_gen_and_i32(ret, arg1, arg2); in tcg_gen_nand_i32()
755 tcg_gen_and_i32(t, t, arg1); in tcg_gen_ctz_i32()
1198 tcg_gen_and_i32(t2, t2, arg2); in tcg_gen_muls2_i32()
1199 tcg_gen_and_i32(t3, t3, arg1); in tcg_gen_muls2_i32()
1228 tcg_gen_and_i32(t2, t2, arg2); in tcg_gen_mulsu2_i32()
1325 tcg_gen_and_i32(t1, arg, t2); /* t1 = .b.d */ in tcg_gen_bswap32_i32()
1326 tcg_gen_and_i32(t0, t0, t2); /* t0 = .a.c */ in tcg_gen_bswap32_i32()
[all …]
H A Dtcg-op-gvec.c1890 tcg_gen_and_i32(t3, t3, m); in tcg_gen_vec_add8_i32()
2073 tcg_gen_and_i32(t3, t3, m); in tcg_gen_vec_sub8_i32()
/qemu/target/rx/
H A Dtranslate.c273 tcg_gen_and_i32(dc->temp, dc->temp, cpu_psw_c); in psw_cond()
832 tcg_gen_and_i32(cpu_psw_s, arg1, arg2); in rx_and()
914 tcg_gen_and_i32(cpu_psw_s, arg1, arg2); in rx_tst()
1046 tcg_gen_and_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z); in rx_sub()
1920 tcg_gen_and_i32(val, val, mask); in rx_btstm()
1948 tcg_gen_and_i32(t0, reg, mask); in rx_btstr()
/qemu/target/m68k/
H A Dtranslate.c568 tcg_gen_and_i32(QREG_CC_V, QREG_CC_V, t1); in gen_flush_flags()
581 tcg_gen_and_i32(QREG_CC_V, QREG_CC_V, t0); in gen_flush_flags()
1886 tcg_gen_and_i32(QREG_CC_Z, src1, tmp); in DISAS_INSN()
2272 tcg_gen_and_i32(dest, src1, im); in DISAS_INSN()
2551 tcg_gen_and_i32(QREG_CC_V, QREG_CC_N, src); in DISAS_INSN()
3087 tcg_gen_and_i32(QREG_CC_V, QREG_CC_V, tmp); in gen_subx()
3250 tcg_gen_and_i32(dest, src, reg); in DISAS_INSN()
3254 tcg_gen_and_i32(dest, src, reg); in DISAS_INSN()
4081 tcg_gen_and_i32(src, src, mask); in DISAS_INSN()
4209 tcg_gen_and_i32(dst, dst, mask); in DISAS_INSN()
[all …]
/qemu/target/sh4/
H A Dtranslate.c719 tcg_gen_and_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc()
941 tcg_gen_and_i32(t1, t1, t2); in _decode_opc()
949 tcg_gen_and_i32(val, REG(B7_4), REG(B11_8)); in _decode_opc()
2111 tcg_gen_and_i32(REG(op_dst), REG(ld_dst), op_arg); in decode_gusa()
/qemu/include/tcg/
H A Dtcg-op.h317 #define tcg_gen_and_tl tcg_gen_and_i32
H A Dtcg-op-common.h176 void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
/qemu/target/arm/tcg/
H A Dtranslate.c428 tcg_gen_and_i32(tmp, tmp, mask); in gen_rev16()
429 tcg_gen_and_i32(var, var, mask); in gen_rev16()
517 tcg_gen_and_i32(cpu_VF, cpu_VF, tmp); in gen_sub_CC()
675 tcg_gen_and_i32(value, value, cpu_ZF); in arm_test_cc()
1913 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1919 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1924 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
3847 DO_ANY3(AND, tcg_gen_and_i32, a->s, STREG_NORMAL)
3857 DO_CMP2(TST, tcg_gen_and_i32, true) in DO_CMP2() argument
H A Dgengvec.c1958 tcg_gen_and_i32(t, a, b); in gen_shadd_i32()
2030 tcg_gen_and_i32(t, a, b); in gen_uhadd_i32()
H A Dtranslate-a64.c1044 tcg_gen_and_i32(cpu_VF, cpu_VF, tmp); in gen_sub32_CC()
2209 tcg_gen_and_i32(cpu_ZF, z, cpu_CF); in trans_XAFLAG()
8605 tcg_gen_and_i32(cpu_NF, cpu_NF, tcg_t2); in trans_CCMP()
8612 tcg_gen_and_i32(cpu_ZF, cpu_ZF, tcg_t2); in trans_CCMP()
8623 tcg_gen_and_i32(cpu_CF, cpu_CF, tcg_t2); in trans_CCMP()
8632 tcg_gen_and_i32(cpu_VF, cpu_VF, tcg_t2); in trans_CCMP()
/qemu/target/xtensa/
H A Dtranslate.c1339 tcg_gen_and_i32(tmp, arg[1].in, mask); in translate_all()
1353 tcg_gen_and_i32(arg[0].out, arg[1].in, arg[2].in); in translate_and()
1360 tcg_gen_and_i32(tmp, arg[0].in, arg[1].in); in translate_ball()
1368 tcg_gen_and_i32(tmp, arg[0].in, arg[1].in); in translate_bany()
1389 tcg_gen_and_i32(tmp, arg[0].in, tmp); in translate_bb()
1429 [BOOLEAN_AND] = tcg_gen_and_i32, in translate_boolean()
2437 tcg_gen_and_i32(cpu_UR[EXPSTATE], arg[0].in, arg[1].in); in translate_wrmsk_expstate()
/qemu/target/ppc/translate/
H A Dfixedpoint-impl.c.inc310 tcg_gen_and_i32(crf, src2lo, src2hi);
317 tcg_gen_and_i32(src2lo, src2lo, src2hi);
H A Dvmx-impl.c.inc1468 tcg_gen_and_i32(t, t, tcg_constant_i32(1));
3350 tcg_gen_and_i32(t0, t0, t1); \
/qemu/target/ppc/
H A Dtranslate.c1789 tcg_gen_and_i32(t2, t2, t3); in gen_op_arith_divw()
1870 tcg_gen_and_i32(t2, t2, t3); in gen_op_arith_modw()
3878 GEN_CRLOGIC(crand, tcg_gen_and_i32, 0x08);
6068 GEN_CRLOGIC(crand, tcg_gen_and_i32, 0x08),
/qemu/target/microblaze/
H A Dtranslate.c325 DO_TYPEA(and, false, tcg_gen_and_i32) in DO_TYPEA() argument
/qemu/target/sparc/
H A Dtranslate.c817 tcg_gen_and_i32(v, v, t); in gen_op_fpsubs32s()
5060 TRANS(FANDs, VIS1, do_fff, a, tcg_gen_and_i32) in TRANS()
/qemu/target/mips/tcg/
H A Dmxu_translate.c1755 tcg_gen_and_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32AND()
H A Dtranslate.c8741 tcg_gen_and_i32(t0, t0, t1); in gen_compute_branch1()
8743 tcg_gen_and_i32(t0, t0, t1); in gen_compute_branch1()
/qemu/target/s390x/tcg/
H A Dtranslate_vx.c.inc2059 tcg_gen_and_i32(t, t, b);