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Searched refs:t3 (Results 1 – 25 of 36) sorted by relevance

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/qemu/target/mips/tcg/
H A Dmxu_translate.c996 TCGv t0, t1, t2, t3; in gen_mxu_d16mul() local
1002 t3 = tcg_temp_new(); in gen_mxu_d16mul()
1019 gen_load_mxu_gpr(t3, XRc); in gen_mxu_d16mul()
1020 tcg_gen_sextract_tl(t2, t3, 0, 16); in gen_mxu_d16mul()
1021 tcg_gen_sextract_tl(t3, t3, 16, 16); in gen_mxu_d16mul()
1025 tcg_gen_mul_tl(t3, t1, t3); in gen_mxu_d16mul()
1029 tcg_gen_mul_tl(t3, t0, t3); in gen_mxu_d16mul()
1033 tcg_gen_mul_tl(t3, t1, t3); in gen_mxu_d16mul()
1037 tcg_gen_mul_tl(t3, t0, t3); in gen_mxu_d16mul()
1045 tcg_gen_shli_tl(t3, t3, 1); in gen_mxu_d16mul()
[all …]
H A Dtranslate.c2845 TCGv_i32 t3 = tcg_temp_new_i32(); in gen_shift() local
2848 tcg_gen_trunc_tl_i32(t3, t1); in gen_shift()
2850 tcg_gen_rotr_i32(t2, t3, t2); in gen_shift()
3029 TCGv t3 = tcg_temp_new(); in gen_r6_muldiv() local
3033 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1); in gen_r6_muldiv()
3034 tcg_gen_and_tl(t2, t2, t3); in gen_r6_muldiv()
3035 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, 0); in gen_r6_muldiv()
3036 tcg_gen_or_tl(t2, t2, t3); in gen_r6_muldiv()
3045 TCGv t3 = tcg_temp_new(); in gen_r6_muldiv() local
3049 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1); in gen_r6_muldiv()
[all …]
H A Dnanomips_translate.c.inc1810 TCGv_i64 t3 = tcg_temp_new_i64();
1815 tcg_gen_ext_tl_i64(t3, t1);
1816 tcg_gen_mul_i64(t2, t2, t3);
1817 tcg_gen_concat_tl_i64(t3, cpu_LO[acc], cpu_HI[acc]);
1818 tcg_gen_add_i64(t2, t2, t3);
1828 TCGv_i32 t3 = tcg_temp_new_i32();
1836 tcg_gen_trunc_tl_i32(t3, t1);
1837 tcg_gen_muls2_i32(t2, t3, t2, t3);
1839 tcg_gen_ext_i32_tl(cpu_HI[acc], t3);
1863 TCGv_i64 t3 = tcg_temp_new_i64();
[all …]
/qemu/crypto/
H A Daes.c1451 u32 s0, s1, s2, s3, t0, t1, t2, t3; in AES_encrypt() local
1472 …t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0x… in AES_encrypt()
1474 …[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[ 8]; in AES_encrypt()
1475 …s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0x… in AES_encrypt()
1476 …s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0x… in AES_encrypt()
1477 …s3 = AES_Te0[t3 >> 24] ^ AES_Te1[(t0 >> 16) & 0xff] ^ AES_Te2[(t1 >> 8) & 0xff] ^ AES_Te3[t2 & 0x… in AES_encrypt()
1482 …t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0x… in AES_encrypt()
1484 …[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[16]; in AES_encrypt()
1485 …s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0x… in AES_encrypt()
1486 …s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0x… in AES_encrypt()
[all …]
/qemu/include/exec/
H A Dhelper-gen.h.inc41 #define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
44 dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \
48 dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3)); \
51 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
55 dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \
60 dh_arg(t3, 3), dh_arg(t4, 4)); \
63 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
66 dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
71 dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
75 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
[all …]
H A Dhelper-proto.h.inc32 #define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
34 dh_ctype(t3)) DEF_HELPER_ATTR;
36 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
37 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
40 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
41 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
44 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
45 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
49 #define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
50 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
H A Dhelper-head.h.inc136 #define DEF_HELPER_3(name, ret, t1, t2, t3) \
137 DEF_HELPER_FLAGS_3(name, 0, ret, t1, t2, t3)
138 #define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \
139 DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4)
140 #define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \
141 DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
142 #define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
143 DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
144 #define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
145 DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
/qemu/host/include/aarch64/host/
H A Dbufferiszero.c.inc17 uint32x4_t t0, t1, t2, t3;
29 t3 = e[-3] | e[-2];
32 REASSOC_BARRIER(t2, t3);
34 t2 |= t3;
55 t3 = p[6] | p[7];
57 REASSOC_BARRIER(t2, t3);
59 t2 |= t3;
/qemu/target/tricore/
H A Dop_helper.c674 int64_t t3 = sextract64(r3, 0, 32); in helper_madd32_ssov() local
677 result = t2 + (t1 * t3); in helper_madd32_ssov()
686 uint64_t t3 = extract64(r3, 0, 32); in helper_madd32_suov() local
689 result = t2 + (t1 * t3); in helper_madd32_suov()
698 int64_t t3 = sextract64(r3, 0, 32); in helper_madd64_ssov() local
701 mul = t1 * t3; in helper_madd64_ssov()
772 int64_t t3 = sextract64(r3, 0, 32); in helper_madd64_q_ssov() local
776 mul = (t2 * t3) << n; in helper_madd64_q_ssov()
823 int64_t t3 = sextract64(r3, 0, 32); in helper_maddr_q_ssov() local
826 if ((t2 == -0x8000ll) && (t3 == -0x8000ll) && (n == 1)) { in helper_maddr_q_ssov()
[all …]
H A Dtranslate.c494 TCGv_i64 t3 = tcg_temp_new_i64(); in gen_madd32_d() local
498 tcg_gen_ext_i32_i64(t3, r3); in gen_madd32_d()
500 tcg_gen_mul_i64(t1, t1, t3); in gen_madd32_d()
506 tcg_gen_setcondi_i64(TCG_COND_GT, t3, t1, 0x7fffffffLL); in gen_madd32_d()
509 tcg_gen_or_i64(t2, t2, t3); in gen_madd32_d()
533 TCGv t3 = tcg_temp_new(); in gen_madd64_d() local
538 tcg_gen_add2_tl(t3, t4, r2_low, r2_high, t1, t2); in gen_madd64_d()
551 tcg_gen_mov_tl(ret_low, t3); in gen_madd64_d()
561 TCGv_i64 t3 = tcg_temp_new_i64(); in gen_maddu64_d() local
565 tcg_gen_extu_i32_i64(t3, r3); in gen_maddu64_d()
[all …]
/qemu/tcg/
H A Dtcg-op-gvec.c836 TCGv_i32 t3 = tcg_temp_new_i32(); in expand_4_i32() local
842 tcg_gen_ld_i32(t3, tcg_env, cofs + i); in expand_4_i32()
843 fni(t0, t1, t2, t3); in expand_4_i32()
849 tcg_temp_free_i32(t3); in expand_4_i32()
863 TCGv_i32 t3 = tcg_temp_new_i32(); in expand_4i_i32() local
869 tcg_gen_ld_i32(t3, tcg_env, cofs + i); in expand_4i_i32()
870 fni(t0, t1, t2, t3, c); in expand_4i_i32()
873 tcg_temp_free_i32(t3); in expand_4i_i32()
999 TCGv_i64 t3 = tcg_temp_new_i64(); in expand_4_i64() local
1005 tcg_gen_ld_i64(t3, tcg_env, cofs + i); in expand_4_i64()
[all …]
H A Dtcg-op.c1193 TCGv_i32 t3 = tcg_temp_ebb_new_i32(); in tcg_gen_muls2_i32() local
1197 tcg_gen_sari_i32(t3, arg2, 31); in tcg_gen_muls2_i32()
1199 tcg_gen_and_i32(t3, t3, arg1); in tcg_gen_muls2_i32()
1201 tcg_gen_sub_i32(rh, rh, t3); in tcg_gen_muls2_i32()
1206 tcg_temp_free_i32(t3); in tcg_gen_muls2_i32()
3011 TCGv_i64 t3 = tcg_temp_ebb_new_i64(); in tcg_gen_muls2_i64() local
3015 tcg_gen_sari_i64(t3, arg2, 63); in tcg_gen_muls2_i64()
3017 tcg_gen_and_i64(t3, t3, arg1); in tcg_gen_muls2_i64()
3019 tcg_gen_sub_i64(rh, rh, t3); in tcg_gen_muls2_i64()
3024 tcg_temp_free_i64(t3); in tcg_gen_muls2_i64()
/qemu/target/ppc/
H A Dtranslate.c1256 TCGv_i32 t3 = tcg_constant_i32(cause); in gen_fscr_facility_check() local
1258 gen_helper_fscr_facility_check(tcg_env, t1, t2, t3); in gen_fscr_facility_check()
1266 TCGv_i32 t3 = tcg_constant_i32(cause); in gen_msr_facility_check() local
1268 gen_helper_msr_facility_check(tcg_env, t1, t2, t3); in gen_msr_facility_check()
1782 TCGv_i32 t3 = tcg_temp_new_i32(); in gen_op_arith_divw() local
1788 tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, -1); in gen_op_arith_divw()
1789 tcg_gen_and_i32(t2, t2, t3); in gen_op_arith_divw()
1790 tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, 0); in gen_op_arith_divw()
1791 tcg_gen_or_i32(t2, t2, t3); in gen_op_arith_divw()
1792 tcg_gen_movi_i32(t3, 0); in gen_op_arith_divw()
[all …]
/qemu/linux-user/riscv/
H A Dvdso.S62 li t3, 1000
63 divu t2, t2, t3 /* nsec -> usec */
H A Dtarget_syscall.h40 abi_long t3; member
/qemu/linux-headers/asm-riscv/
H A Dptrace.h53 unsigned long t3; member
/qemu/tests/tcg/loongarch64/system/
H A Dregdef.h25 #define t3 $r15 macro
/qemu/tcg/mips/
H A Dtcg-target.c.inc63 "t3",
2634 /* t3 = (ssss)d000 */
2640 /* t3 = d00a */
2648 /* t3 = dc0a */
2651 /* t3 = dcba -- delay slot */
2664 /* t3 = 000a */
2670 /* t3 = d00a */
2678 /* t3 = dc0a */
2681 /* t3 = dcba -- delay slot */
2688 /* t3 = h0000000 */
[all …]
/qemu/target/avr/
H A Dtranslate.c220 TCGv t3 = tcg_temp_new_i32(); in gen_add_CHf() local
224 tcg_gen_andc_tl(t3, Rr, R); /* t3 = Rr & ~R */ in gen_add_CHf()
226 tcg_gen_or_tl(t1, t1, t3); in gen_add_CHf()
251 TCGv t3 = tcg_temp_new_i32(); in gen_sub_CHf() local
255 tcg_gen_or_tl(t3, t1, Rr); /* t3 = (~Rd | Rr) & R */ in gen_sub_CHf()
256 tcg_gen_and_tl(t3, t3, R); in gen_sub_CHf()
257 tcg_gen_or_tl(t2, t2, t3); /* t2 = ~Rd & Rr | ~Rd & R | R & Rr */ in gen_sub_CHf()
/qemu/target/arm/tcg/
H A Dpauth_helper.c142 int i0, i4, i8, ic, t0, t1, t2, t3; in pac_mult() local
152 t3 = rot_cell(ic, 1) ^ rot_cell(i8, 2) ^ rot_cell(i4, 1); in pac_mult()
154 o |= (uint64_t)t3 << b; in pac_mult()
H A Dtranslate.c4254 TCGv_i32 t0, t1, t2, t3; in op_mlal() local
4265 t3 = load_reg(s, a->rd); in op_mlal()
4266 tcg_gen_add2_i32(t0, t1, t0, t1, t2, t3); in op_mlal()
4556 TCGv_i32 t1, t2, t3; in op_crc32() local
4576 t3 = tcg_constant_i32(1 << sz); in op_crc32()
4578 gen_helper_crc32c(t1, t1, t2, t3); in op_crc32()
4580 gen_helper_crc32(t1, t1, t2, t3); in op_crc32()
5978 TCGv_i32 t1, t2, t3; in trans_SEL() local
5988 t3 = tcg_temp_new_i32(); in trans_SEL()
5989 tcg_gen_ld_i32(t3, tcg_env, offsetof(CPUARMState, GE)); in trans_SEL()
[all …]
/qemu/target/ppc/translate/
H A Dfp-impl.c.inc37 TCGv_i64 t0, t1, t2, t3;
43 t3 = tcg_temp_new_i64();
48 helper(t3, tcg_env, t0, t1, t2);
49 set_fpr(a->frt, t3);
50 gen_compute_fprf_float64(t3);
/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_vec.c.inc849 TCGv_vec t1, t2, t3;
853 t3 = tcg_constant_vec_matching(t, vece, MAKE_64BIT_MASK(0, 4 << vece));
854 tcg_gen_and_vec(vece, t1, a, t3);
855 tcg_gen_and_vec(vece, t2, b, t3);
1011 TCGv_vec t1, t2, t3;
1015 t3 = tcg_constant_vec_matching(t, vece, MAKE_64BIT_MASK(0, 4 << vece));
1016 tcg_gen_and_vec(vece, t1, a, t3);
1017 tcg_gen_and_vec(vece, t2, b, t3);
1173 TCGv_vec t1, t2, t3;
1179 t3 = tcg_constant_vec_matching(t, vece, MAKE_64BIT_MASK(0, halfbits));
[all …]
/qemu/target/s390x/tcg/
H A Dtranslate.c1955 TCGv_i32 t1, t3; in op_clcle() local
1964 t3 = tcg_constant_i32(r3); in op_clcle()
1965 gen_helper_clcle(cc_op, tcg_env, t1, o->in2, t3); in op_clcle()
1974 TCGv_i32 t1, t3; in op_clclu() local
1983 t3 = tcg_constant_i32(r3); in op_clclu()
1984 gen_helper_clclu(cc_op, tcg_env, t1, o->in2, t3); in op_clclu()
3228 TCGv_i32 t1, t3; in op_mvcle() local
3237 t3 = tcg_constant_i32(r3); in op_mvcle()
3238 gen_helper_mvcle(cc_op, tcg_env, t1, o->in2, t3); in op_mvcle()
3247 TCGv_i32 t1, t3; in op_mvclu() local
[all …]
/qemu/tcg/i386/
H A Dtcg-target.c.inc4486 TCGv_vec t1, t2, t3, t4, zero;
4521 t3 = tcg_temp_new_vec(type);
4529 tcgv_vec_arg(t3), tcgv_vec_arg(v1), tcgv_vec_arg(zero));
4533 tcg_gen_mul_vec(MO_16, t3, t3, t4);
4535 tcg_gen_shri_vec(MO_16, t3, t3, 8);
4537 tcgv_vec_arg(v0), tcgv_vec_arg(t1), tcgv_vec_arg(t3));
4540 tcg_temp_free_vec(t3);
4562 TCGv_vec t3 = tcg_constant_vec(type, vece, 1ull << ((8 << vece) - 1));
4564 tcg_gen_sub_vec(vece, t1, v1, t3);
4565 tcg_gen_sub_vec(vece, t2, v2, t3);

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