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Searched refs:sstateen (Results 1 – 3 of 3) sorted by relevance

/qemu/target/riscv/
H A Dmachine.c277 VMSTATE_UINT64_ARRAY(env.sstateen, RISCVCPU, 4),
H A Dcsr.c67 if (env->priv == PRV_U && !(env->sstateen[index] & bit)) { in smstateen_acc_ok()
73 if (!(env->sstateen[index] & bit)) { in smstateen_acc_ok()
536 static RISCVException sstateen(CPURISCVState *env, int csrno) in sstateen() function
3594 *val = env->sstateen[index] & env->mstateen[index]; in read_sstateen()
3615 reg = &env->sstateen[index]; in write_sstateen()
5923 [CSR_SSTATEEN0] = { "sstateen0", sstateen, read_sstateen, write_sstateen0,
5925 [CSR_SSTATEEN1] = { "sstateen1", sstateen, read_sstateen,
5928 [CSR_SSTATEEN2] = { "sstateen2", sstateen, read_sstateen,
5931 [CSR_SSTATEEN3] = { "sstateen3", sstateen, read_sstateen,
H A Dcpu.h471 uint64_t sstateen[SMSTATEEN_MAX_COUNT]; member