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Searched refs:sew (Results 1 – 8 of 8) sorted by relevance

/qemu/target/riscv/insn_trans/
H A Dtrans_rvbf16.c.inc72 if (opfv_narrow_check(ctx, a) && (ctx->sew == MO_16)) {
97 if (opfv_widen_check(ctx, a) && (ctx->sew == MO_16)) {
122 uint8_t sew = ctx->sew;
123 if (require_rvv(ctx) && vext_check_isa_ill(ctx) && (ctx->sew == MO_16) &&
125 vext_check_input_eew(ctx, a->rd, sew + 1, a->rs1, sew, a->vm) &&
126 vext_check_input_eew(ctx, a->rd, sew + 1, a->rs2, sew, a->vm)) {
152 uint8_t sew = ctx->sew;
153 if (require_rvv(ctx) && (ctx->sew == MO_16) && vext_check_isa_ill(ctx) &&
155 vext_check_input_eew(ctx, a->rd, sew + 1, a->rs2, sew, a->vm)) {
H A Dtrans_rvvk.c.inc38 s->sew == MO_64;
58 s->sew == MO_64;
78 return do_opivi_gvec(s, a, tcg_gen_gvec_##SUF, fns[s->sew], \
94 return do_opivv_gvec(s, a, tcg_gen_gvec_##SUF, fns[s->sew]); \
110 fns[s->sew]); \
147 return do_opivx_gvec(s, a, tcg_gen_gvec_##SUF, fns[s->sew]); \
176 data, fns[s->sew]); \
226 return opivi_trans(a->rd, a->rs1, a->rs2, a->vm, fns[s->sew], s, \
277 int egw_bytes = ZVKNED_EGS << s->sew;
284 s->sew == MO_32;
[all …]
H A Dtrans_rvv.c.inc41 switch (s->sew) {
59 switch (s->sew) {
75 switch (s->sew) {
93 switch (s->sew) {
276 int8_t emul = eew - s->sew + s->lmul;
315 int8_t emul = eew - s->sew + s->lmul;
353 int8_t emul = eew - s->sew + s->lmul;
361 if (eew > s->sew) {
365 } else if (eew < s->sew) {
392 int8_t emul_vs1 = eew_vs1 - s->sew + s->lmul;
[all …]
/qemu/target/riscv/
H A Dvector_internals.h118 uint32_t sew = 1 << FIELD_EX64(env->vtype, VTYPE, VSEW); in vext_get_total_elems() local
119 int8_t emul = ctzl(esz) - ctzl(sew) + vext_lmul(desc) < 0 ? 0 : in vext_get_total_elems()
120 ctzl(esz) - ctzl(sew) + vext_lmul(desc); in vext_get_total_elems()
H A Dvcrypto_helper.c462 uint32_t sew = FIELD_EX64(env->vtype, VTYPE, VSEW); in HELPER() local
463 uint32_t esz = sew == MO_32 ? 4 : 8; in HELPER()
470 if (sew == MO_32) { in HELPER()
H A Dtranslate.c97 uint8_t sew; member
1272 ctx->sew = FIELD_EX32(tb_flags, TB_FLAGS, SEW); in riscv_tr_init_disas_context()
H A Dvector_helper.c44 uint16_t sew = 8 << vsew; in HELPER() local
62 if (vlmul == 4 || (vlen >> (8 - vlmul)) < sew) { in HELPER()
67 if ((sew > cpu->cfg.elen) || vill || (ediv != 0) || (reserved != 0)) { in HELPER()
/qemu/disas/
H A Driscv.c5271 const int sew = 1 << (((dec->vzimm >> 3) & 0b111) + 3); in format_inst() local
5277 g_string_append_printf(buf, "e%d,m", sew); in format_inst()