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Searched refs:set_field (Results 1 – 11 of 11) sorted by relevance

/qemu/target/riscv/
H A Dop_helper.c300 mstatus = set_field(mstatus, MSTATUS_SIE, in helper_sret()
302 mstatus = set_field(mstatus, MSTATUS_SPIE, 1); in helper_sret()
303 mstatus = set_field(mstatus, MSTATUS_SPP, PRV_U); in helper_sret()
311 env->vsstatus = set_field(env->vsstatus, MSTATUS_SDT, 0); in helper_sret()
314 mstatus = set_field(mstatus, MSTATUS_SDT, 0); in helper_sret()
317 mstatus = set_field(mstatus, MSTATUS_MDT, 0); in helper_sret()
320 mstatus = set_field(mstatus, MSTATUS_MPRV, 0); in helper_sret()
329 hstatus = set_field(hstatus, HSTATUS_SPV, 0); in helper_sret()
347 env->mstatus = set_field(env->mstatus, MSTATUS_SPELP, 0); in helper_sret()
382 mstatus = set_field(mstatus, MSTATUS_SDT, 0); in ssdbltrp_mxret()
[all …]
H A Dcpu_helper.c1013 set_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK, head); in riscv_ctr_add_entry()
1024 env->ctr_data[head] = set_field(0, CTRDATA_TYPE_MASK, type); in riscv_ctr_add_entry()
1028 env->sctrstatus = set_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK, head); in riscv_ctr_add_entry()
2131 env->mnstatus = set_field(env->mnstatus, MNSTATUS_NMIE, false); in riscv_do_nmi()
2132 env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPV, virt); in riscv_do_nmi()
2133 env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPP, env->priv); in riscv_do_nmi()
2139 env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPELP, env->elp); in riscv_do_nmi()
2318 env->mstatus = set_field(env->mstatus, MSTATUS_SPELP, env->elp); in riscv_cpu_do_interrupt()
2336 env->hstatus = set_field(env->hstatus, HSTATUS_SPVP, in riscv_cpu_do_interrupt()
2338 env->hstatus = set_field(env->hstatus, HSTATUS_SPV, true); in riscv_cpu_do_interrupt()
[all …]
H A Ddebug.c266 textra = set_field(textra, TEXTRA32_MHVALUE, mhvalue); in textra_validate()
267 textra = set_field(textra, TEXTRA32_MHSELECT, mhselect_new); in textra_validate()
271 textra = set_field(textra, TEXTRA64_MHVALUE, mhvalue); in textra_validate()
272 textra = set_field(textra, TEXTRA64_MHSELECT, mhselect_new); in textra_validate()
681 env->tdata1[index] = set_field(env->tdata1[index], in itrigger_set_count()
H A Dcpu.c703 env->mstatus = set_field(env->mstatus, MSTATUS64_SXL, env->misa_mxl); in riscv_cpu_reset_hold()
704 env->mstatus = set_field(env->mstatus, MSTATUS64_UXL, env->misa_mxl); in riscv_cpu_reset_hold()
706 env->vsstatus = set_field(env->vsstatus, in riscv_cpu_reset_hold()
708 env->vsstatus = set_field(env->vsstatus, in riscv_cpu_reset_hold()
710 env->mstatus_hs = set_field(env->mstatus_hs, in riscv_cpu_reset_hold()
712 env->mstatus_hs = set_field(env->mstatus_hs, in riscv_cpu_reset_hold()
716 env->mstatus = set_field(env->mstatus, MSTATUS_MDT, 1); in riscv_cpu_reset_hold()
789 env->mnstatus = set_field(env->mnstatus, MNSTATUS_NMIE, false); in riscv_cpu_reset_hold()
H A Dcpu_bits.h8 #define set_field(reg, mask, val) (((reg) & ~(uint64_t)(mask)) | \ macro
H A Dcsr.c1970 val = set_field(val, MSTATUS_MPP, old_mpp); in legalize_mpp()
4317 env->sctrdepth = set_field(env->sctrdepth, SCTRDEPTH_MASK, depth); in rmw_sctrdepth()
4503 *val = set_field(*val, HSTATUS_VSXL, 2); in read_hstatus()
4506 *val = set_field(*val, HSTATUS_VSBE, 0); in read_hstatus()
/qemu/hw/riscv/
H A Driscv-iommu.c538 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_CAUSE, cause); in riscv_iommu_report_fault()
539 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_TTYPE, fault_type); in riscv_iommu_report_fault()
540 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_DID, ctx->devid); in riscv_iommu_report_fault()
541 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PV, true); in riscv_iommu_report_fault()
544 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PID, ctx->process_id); in riscv_iommu_report_fault()
894 ctx->gatp = set_field(0, RISCV_IOMMU_ATP_MODE_FIELD, in riscv_iommu_ctx_fetch()
896 ctx->satp = set_field(0, RISCV_IOMMU_ATP_MODE_FIELD, in riscv_iommu_ctx_fetch()
1487 pr.hdr = set_field(RISCV_IOMMU_PREQ_HDR_PV, in riscv_iommu_translate()
1490 pr.hdr = set_field(pr.hdr, RISCV_IOMMU_PREQ_HDR_DID, ctx->devid); in riscv_iommu_translate()
1621 new_ddtp = set_field(new_ddtp & RISCV_IOMMU_DDTP_PPN, in riscv_iommu_process_ddtp()
[all …]
H A Driscv-iommu-hpm.c375 val = set_field(val, RISCV_IOMMU_IOHPMEVT_EVENT_ID, in riscv_iommu_process_hpmevt_write()
/qemu/hw/usb/
H A Dhcd-ehci.c89 #define set_field(data, newval, field) do { \ macro
1166 set_field(&q->qh.altnext_qtd, reload, QH_ALTNEXT_NAKCNT); in ehci_qh_do_overlay()
1231 set_field(&q->qh.token, cpage, QTD_TOKEN_CPAGE); in ehci_finish_transfer()
1288 set_field(&q->qh.token, 0, QTD_TOKEN_CERR); in ehci_execute_complete()
1296 set_field(&q->qh.altnext_qtd, 0, QH_ALTNEXT_NAKCNT); in ehci_execute_complete()
1323 set_field(&q->qh.token, tbytes, QTD_TOKEN_TBYTES); in ehci_execute_complete()
1500 set_field(&itd->transact[i], len - ehci->ipacket.actual_length, in ehci_process_itd()
1503 set_field(&itd->transact[i], ehci->ipacket.actual_length, in ehci_process_itd()
H A Dhcd-dwc2.c54 #define set_field(data, newval, field) do { \ macro
347 set_field(&hctsiz, pcnt, TSIZ_PKTCNT); in dwc2_handle_packet()
349 set_field(&hctsiz, len, TSIZ_XFERSIZE); in dwc2_handle_packet()
H A Dhcd-xhci.c219 #define set_field(data, newval, field) do { \ macro
2336 set_field(&slot_ctx[2], xhci->slots[slotid-1].intr, TRB_INTR); in xhci_evaluate_slot()
2659 set_field(&port->portsc, pls, PORTSC_PLS); in xhci_port_update()
2683 set_field(&port->portsc, PLS_U0, PORTSC_PLS); in xhci_port_reset()
2867 set_field(&portsc, new_pls, PORTSC_PLS); in xhci_port_write()
2874 set_field(&portsc, new_pls, PORTSC_PLS); in xhci_port_write()
3257 set_field(&port->portsc, PLS_RESUME, PORTSC_PLS); in xhci_wakeup()