Searched refs:sctrstatus (Results 1 – 4 of 4) sorted by relevance
/qemu/target/riscv/ |
H A D | cpu_helper.c | 791 env->sctrstatus |= SCTRSTATUS_FROZEN; in riscv_ctr_freeze() 948 env->sctrstatus & SCTRSTATUS_FROZEN) { in riscv_ctr_add_entry() 1005 head = get_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK); in riscv_ctr_add_entry() 1012 env->sctrstatus = in riscv_ctr_add_entry() 1013 set_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK, head); in riscv_ctr_add_entry() 1028 env->sctrstatus = set_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK, head); in riscv_ctr_add_entry()
|
H A D | csr.c | 2536 idx = get_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK); in rmw_ctrsource() 2575 idx = get_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK); in rmw_ctrtarget() 2615 idx = get_field(env->sctrstatus, SCTRSTATUS_WRPTR_MASK); in rmw_ctrdata() 4322 env->sctrstatus = in rmw_sctrdepth() 4323 env->sctrstatus & (~SCTRSTATUS_WRPTR_MASK | (depth - 1)); in rmw_sctrdepth() 4337 *ret_val = env->sctrstatus; in rmw_sctrstatus() 4340 env->sctrstatus = (env->sctrstatus & ~mask) | (new_val & mask); in rmw_sctrstatus() 4343 env->sctrstatus = env->sctrstatus & (~SCTRSTATUS_WRPTR_MASK | (depth - 1)); in rmw_sctrstatus()
|
H A D | machine.c | 318 VMSTATE_UINT32(env.sctrstatus, RISCVCPU),
|
H A D | cpu.h | 315 uint32_t sctrstatus; member
|