| /qemu/target/sh4/ |
| H A D | cpu.c | 133 SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(obj); in superh_cpu_reset_hold() local
136 if (scc->parent_phases.hold) { in superh_cpu_reset_hold()
137 scc->parent_phases.hold(obj, type); in superh_cpu_reset_hold()
205 SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc); in sh7750r_class_init() local
207 scc->pvr = 0x00050000; in sh7750r_class_init()
208 scc->prr = 0x00000100; in sh7750r_class_init()
209 scc->cvr = 0x00110000; in sh7750r_class_init()
222 SuperHCPUClass *scc = SUPERH_CPU_CLASS(oc); in sh7751r_class_init() local
224 scc->pvr = 0x04050005; in sh7751r_class_init()
225 scc->prr = 0x00000113; in sh7751r_class_init()
[all …]
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| /qemu/target/s390x/ |
| H A D | cpu.c | 148 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); in s390_cpu_reset_hold() local
151 if (scc->parent_phases.hold) { in s390_cpu_reset_hold()
152 scc->parent_phases.hold(obj, type); in s390_cpu_reset_hold()
232 S390CPUClass *scc = S390_CPU_GET_CLASS(dev); in s390_cpu_realizefn() local
270 scc->parent_realize(dev, &err); in s390_cpu_realizefn()
391 S390CPUClass *scc = S390_CPU_CLASS(oc); in s390_cpu_class_init() local
392 CPUClass *cc = CPU_CLASS(scc); in s390_cpu_class_init()
397 &scc->parent_realize); in s390_cpu_class_init()
401 &scc->parent_phases); in s390_cpu_class_init()
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| H A D | cpu_models_system.c | 58 S390CPUClass *scc = S390_CPU_CLASS(klass); in create_cpu_model_list() local
65 info->migration_safe = scc->is_migration_safe; in create_cpu_model_list()
66 info->q_static = scc->is_static; in create_cpu_model_list()
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| H A D | cpu_models.c | 347 const S390CPUClass *scc = S390_CPU_CLASS((ObjectClass *)data); in s390_print_cpu_model_list_entry() local
348 CPUClass *cc = CPU_CLASS(scc); in s390_print_cpu_model_list_entry()
352 if (scc->is_static) { in s390_print_cpu_model_list_entry()
355 if (scc->is_migration_safe) { in s390_print_cpu_model_list_entry()
369 qemu_printf(" %-15s %-35s (%s)\n", name, scc->desc, details->str); in s390_print_cpu_model_list_entry()
371 qemu_printf(" %-15s %-35s\n", name, scc->desc); in s390_print_cpu_model_list_entry()
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| H A D | cpu-system.c | 187 S390CPUClass *scc = S390_CPU_CLASS(cc); in s390_cpu_system_class_init() local
189 scc->load_normal = s390_cpu_load_normal; in s390_cpu_system_class_init()
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| H A D | cpu.h | 865 S390CPUClass *scc = S390_CPU_GET_CLASS(cs); in s390_do_cpu_load_normal() local
867 scc->load_normal(cs); in s390_do_cpu_load_normal()
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| /qemu/target/sparc/ |
| H A D | cpu.c | 38 SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(obj); in sparc_cpu_reset_hold() local
41 if (scc->parent_phases.hold) { in sparc_cpu_reset_hold()
42 scc->parent_phases.hold(obj, type); in sparc_cpu_reset_hold()
858 SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev); in sparc_cpu_realizefn() local
901 scc->parent_realize(dev, errp); in sparc_cpu_realizefn()
907 SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(obj); in sparc_cpu_initfn() local
910 if (scc->cpu_def) { in sparc_cpu_initfn()
911 env->def = *scc->cpu_def; in sparc_cpu_initfn()
1064 SPARCCPUClass *scc = SPARC_CPU_CLASS(oc); in sparc_cpu_class_init() local
1070 &scc->parent_realize); in sparc_cpu_class_init()
[all …]
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| /qemu/hw/arm/ |
| H A D | mps3r.c | 114 MPS2SCC scc; member
515 object_initialize_child(OBJECT(mms), "scc", &mms->scc, TYPE_MPS2_SCC); in mps3r_common_init()
516 qdev_prop_set_uint32(DEVICE(&mms->scc), "scc-cfg0", 0); in mps3r_common_init()
517 qdev_prop_set_uint32(DEVICE(&mms->scc), "scc-cfg4", 0x2); in mps3r_common_init()
518 qdev_prop_set_uint32(DEVICE(&mms->scc), "scc-aid", 0x00200008); in mps3r_common_init()
519 qdev_prop_set_uint32(DEVICE(&mms->scc), "scc-id", 0x41055360); in mps3r_common_init()
524 qdev_prop_set_array(DEVICE(&mms->scc), "oscclk", oscclk); in mps3r_common_init()
525 sysbus_realize(SYS_BUS_DEVICE(&mms->scc), &error_fatal); in mps3r_common_init()
526 sysbus_mmio_map(SYS_BUS_DEVICE(&mms->scc), 0, 0xe0200000); in mps3r_common_init()
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| H A D | mps2-tz.c | 144 MPS2SCC scc; member
462 MPS2SCC *scc = opaque; in make_scc() local
468 object_initialize_child(OBJECT(mms), "scc", scc, TYPE_MPS2_SCC); in make_scc()
469 sccdev = DEVICE(scc); in make_scc()
481 sysbus_realize(SYS_BUS_DEVICE(scc), &error_fatal); in make_scc()
966 { "scc", make_scc, &mms->scc, 0x40300000, 0x1000 }, in mps2tz_common_init()
1020 { "scc", make_scc, &mms->scc, 0x41300000, 0x1000 }, in mps2tz_common_init()
1075 { "scc", make_scc, &mms->scc, 0x49300000, 0x1000 }, in mps2tz_common_init()
1210 qdev_connect_gpio_out_named(DEVICE(&mms->scc), "remap", 0, in mps2tz_common_init()
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| H A D | mps2.c | 84 MPS2SCC scc; member
395 object_initialize_child(OBJECT(mms), "scc", &mms->scc, TYPE_MPS2_SCC); in mps2_common_init()
396 sccdev = DEVICE(&mms->scc); in mps2_common_init()
407 sysbus_realize(SYS_BUS_DEVICE(&mms->scc), &error_fatal); in mps2_common_init()
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| H A D | musca.c | 79 UnimplementedDeviceState scc; member
333 { "scc", make_unimp_dev, &mms->scc, 0xc000, 0x1000 }, in make_musca_a_devs()
493 { "scc", make_unimp_dev, &mms->scc, 0x5010b000, 0x1000 }, in musca_init()
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| /qemu/hw/ppc/ |
| H A D | spapr_cpu_core.c | 301 SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(sc); in spapr_create_vcpu() local
309 obj = object_new(scc->cpu_type); in spapr_create_vcpu()
379 SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc); in spapr_cpu_core_class_init() local
385 scc->cpu_type = data; in spapr_cpu_core_class_init()
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| /qemu/hw/sh4/ |
| H A D | sh7750.c | 215 SuperHCPUClass *scc; in sh7750_mem_readl() local
250 scc = SUPERH_CPU_GET_CLASS(s->cpu); in sh7750_mem_readl()
251 return scc->pvr; in sh7750_mem_readl()
253 scc = SUPERH_CPU_GET_CLASS(s->cpu); in sh7750_mem_readl()
254 return scc->cvr; in sh7750_mem_readl()
256 scc = SUPERH_CPU_GET_CLASS(s->cpu); in sh7750_mem_readl()
257 return scc->prr; in sh7750_mem_readl()
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| /qemu/target/hppa/ |
| H A D | cpu.c | 215 HPPACPUClass *scc = HPPA_CPU_GET_CLASS(obj); in hppa_cpu_reset_hold() local
220 if (scc->parent_phases.hold) { in hppa_cpu_reset_hold()
221 scc->parent_phases.hold(obj, type); in hppa_cpu_reset_hold()
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| /qemu/hw/misc/ |
| H A D | meson.build | 115 system_ss.add(when: 'CONFIG_MPS2_SCC', if_true: files('mps2-scc.c'))
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| H A D | trace-events | 101 # mps2-scc.c
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| /qemu/target/m68k/ |
| H A D | translate.c | 1442 DISAS_INSN(scc) in DISAS_INSN() argument
5886 INSN(scc, 50c0, f0f8, CF_ISA_A); /* Scc.B Dx */ in register_m68k_insns()
5887 INSN(scc, 50c0, f0c0, M68K); /* Scc.B <EA> */ in register_m68k_insns()
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