/qemu/target/arm/tcg/ |
H A D | t16.decode | 25 &s_rri_rot !extern s rn rd imm rot 27 &rrr_rot !extern rd rn rm rot 62 RSB_rri 010000 1001 rn:3 rd:3 &s_rri_rot %s imm=0 rot=0 124 &s_rri_rot rn=13 s=0 rot=0 imm=%imm8_0x4 # SP 152 &s_rri_rot %s rot=0 161 &s_rri_rot rot=0 rn=%reg_8 182 &s_rri_rot s=0 rd=13 rn=13 rot=0 imm=%imm7_0x4 198 @extend .... .... .. rm:3 rd:3 &rrr_rot rn=15 rot=0
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H A D | neon-shared.decode | 43 VCMLA 1111 110 rot:2 . 1 . .... .... 1000 . q:1 . 0 .... \ 46 VCADD 1111 110 rot:1 1 . 0 . .... .... 1000 . q:1 . 0 .... \ 76 VCMLA_scalar 1111 1110 0 . rot:2 .... .... 1000 . q:1 index:1 0 vm:4 \ 78 VCMLA_scalar 1111 1110 1 . rot:2 .... .... 1000 . q:1 . 0 .... \
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H A D | a32.decode | 28 &s_rri_rot s rn rd imm rot 31 &rrr_rot rd rn rm rot 116 &s_rri_rot rot=%a32extrot 118 &s_rri_rot rot=%a32extrot rn=0 120 &s_rri_rot rot=%a32extrot rd=0 s=1 185 &msr_i r mask rot imm 186 @msr_i ---- .... .... mask:4 .... rot:4 imm:8 &msr_i 488 @rrr_rot ---- .... .... rn:4 rd:4 rot:2 ...... rm:4 &rrr_rot
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H A D | t32.decode | 25 &s_rri_rot !extern s rn rd imm rot 28 &rrr_rot !extern rd rn rm rot 172 &s_rri_rot imm=%t32extimm rot=%t32extrot 174 &s_rri_rot imm=%t32extimm rot=%t32extrot rn=0 176 &s_rri_rot imm=%t32extimm rot=%t32extrot s=1 rd=0 212 &s_rri_rot imm=%imm12_26_12_0 rot=0 s=0 415 &s_rri_rot rot=0 s=1 rd=15 rn=14 665 @rrr_rot .... .... .... rn:4 .... rd:4 .. rot:2 rm:4 &rrr_rot
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H A D | sve.decode | 849 CDOT_zzzz 01000100 esz:2 0 rm:5 0001 rot:2 rn:5 rd:5 ra=%reg_movprfx 890 CDOT_zzxw_s 01000100 10 1 index:2 rm:3 0100 rot:2 rn:5 rd:5 \ 892 CDOT_zzxw_d 01000100 11 1 index:1 rm:4 0100 rot:2 rn:5 rd:5 \ 896 CMLA_zzxz_h 01000100 10 1 index:2 rm:3 0110 rot:2 rn:5 rd:5 \ 898 CMLA_zzxz_s 01000100 11 1 index:1 rm:4 0110 rot:2 rn:5 rd:5 \ 902 SQRDCMLAH_zzxz_h 01000100 10 1 index:2 rm:3 0111 rot:2 rn:5 rd:5 \ 904 SQRDCMLAH_zzxz_s 01000100 11 1 index:1 rm:4 0111 rot:2 rn:5 rd:5 \ 955 FCADD 01100100 esz:2 00000 rot:1 100 pg:3 rm:5 rd:5 \ 959 FCMLA_zpzzz 01100100 esz:2 0 rm:5 0 rot:2 pg:3 rn:5 rd:5 \ 963 FCMLA_zzxz 01100100 10 1 index:2 rm:3 0001 rot:2 rn:5 rd:5 \ [all …]
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H A D | sve_helper.c | 1332 int rot = simd_data(desc); \ in DO_SQDMLAL() 1333 int sel_a = rot & 1, sel_b = sel_a ^ 1; \ in DO_SQDMLAL() 1334 bool sub_r = rot == 1 || rot == 2; \ in DO_SQDMLAL() 1335 bool sub_i = rot >= 2; \ in DO_SQDMLAL() 1371 int rot = extract32(desc, SIMD_DATA_SHIFT, 2); \ 1373 int sel_a = rot & 1, sel_b = sel_a ^ 1; \ 1374 bool sub_r = rot == 1 || rot == 2; \ 1375 bool sub_i = rot >= 2; \ 1435 int rot = simd_data(desc); in HELPER() local 1436 int sel_a = rot & 1; in HELPER() [all …]
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H A D | a64.decode | 1127 FCMLA_v 0 q:1 10 1110 esz:2 0 rm:5 110 rot:2 1 rn:5 rd:5 1255 FCMLA_vi 0 0 10 1111 01 idx:1 rm:5 0 rot:2 1 0 0 rn:5 rd:5 esz=1 q=0 1256 FCMLA_vi 0 1 10 1111 01 . rm:5 0 rot:2 1 . 0 rn:5 rd:5 esz=1 idx=%hl q=1 1257 FCMLA_vi 0 1 10 1111 10 0 rm:5 0 rot:2 1 idx:1 0 rn:5 rd:5 esz=2 q=1
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H A D | vec_helper.c | 882 bool rot = extract32(desc, SIMD_DATA_SHIFT, 1); local 892 if (rot) { 911 bool rot = extract32(desc, SIMD_DATA_SHIFT, 1); in HELPER() local 921 if (rot) { in HELPER() 940 bool rot = extract32(desc, SIMD_DATA_SHIFT, 1); in HELPER() local 950 if (rot) { in HELPER()
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H A D | translate-neon.c | 224 return do_neon_ddda_fpst(s, a->q * 7, a->vd, a->vn, a->vm, a->rot, in trans_VCMLA() 227 return do_neon_ddda_fpst(s, a->q * 7, a->vd, a->vn, a->vm, a->rot, in trans_VCMLA() 263 fpst, opr_sz, opr_sz, a->rot, in trans_VCADD() 337 int data = (a->index << 2) | a->rot; in trans_VCMLA_scalar()
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H A D | translate.c | 3788 imm = ror32(a->imm, a->rot); in op_s_rri_rot() 3789 if (logic_cc && a->rot) { in op_s_rri_rot() 3809 imm = ror32(a->imm, a->rot); in op_s_rxi_rot() 3810 if (logic_cc && a->rot) { in op_s_rxi_rot() 4541 uint32_t val = ror32(a->imm, a->rot * 2); in trans_MSR_imm() 5929 tcg_gen_rotri_i32(tmp, tmp, a->rot * 8); in op_xta()
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H A D | translate-sve.c | 3510 a->rd, a->rn, a->rm, a->ra, (a->index << 2) | a->rot) 3940 a->rd, a->rn, a->rm, a->pg, a->rot | (s->fpcr_ah << 1), 3970 a->rd, a->rn, a->rm, a->ra, a->pg, a->rot | (s->fpcr_ah << 2), 3977 a->rd, a->rn, a->rm, a->ra, a->index * 4 + a->rot, 7099 cmla_fns[a->esz], a->rd, a->rn, a->rm, a->ra, a->rot) 7105 cdot_fns[a->esz], a->rd, a->rn, a->rm, a->ra, a->rot) 7112 sqrdcmlah_fns[a->esz], a->rd, a->rn, a->rm, a->ra, a->rot)
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H A D | translate-a64.c | 6163 a->rot | (s->fpcr_ah << 2), fn[a->esz]); in trans_FCMLA_v() 6915 (s->fpcr_ah << 4) | (a->idx << 2) | a->rot, fn); in trans_FCMLA_vi()
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/qemu/tcg/arm/ |
H A D | tcg-target.c.inc | 376 uint32_t rot, imm8; 384 rot = ctz32(imm) & ~1; 385 imm8 = imm >> rot; 386 rot = 32 - rot; 395 for (rot = 2; rot < 8; rot += 2) { 396 imm8 = rol32(imm, rot); 405 /* Note that rot is even, and we discard bit 0 by shifting by 7. */ 406 return rot << 7 | imm8; 847 int rot; 849 rot = ((32 - sh1) << 7) & 0xf00; [all …]
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/qemu/target/m68k/ |
H A D | translate.c | 4182 TCGv rot = tcg_temp_new(); in DISAS_INSN() local 4186 tcg_gen_subi_i32(rot, DREG(ext, 0), 1); in DISAS_INSN() 4187 tcg_gen_andi_i32(rot, rot, 31); in DISAS_INSN() 4189 tcg_gen_shl_i32(mask, mask, rot); in DISAS_INSN() 4190 tcg_gen_mov_i32(rot, DREG(ext, 0)); in DISAS_INSN() 4197 tcg_gen_movi_i32(rot, len & 31); in DISAS_INSN() 4201 tcg_gen_add_i32(rot, rot, DREG(ext, 6)); in DISAS_INSN() 4204 tcg_gen_addi_i32(rot, rot, ofs); in DISAS_INSN() 4206 tcg_gen_andi_i32(rot, rot, 31); in DISAS_INSN() 4207 tcg_gen_rotr_i32(mask, mask, rot); in DISAS_INSN() [all …]
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/qemu/hw/riscv/ |
H A D | riscv-iommu.c | 202 uint64_t rot = 1; in riscv_iommu_pext_u64() local 207 ret |= rot; in riscv_iommu_pext_u64() 209 rot <<= 1; in riscv_iommu_pext_u64()
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/qemu/target/s390x/tcg/ |
H A D | translate.c | 3590 int pos, len, rot; in op_risbg() local 3634 rot = i5 & 63; in op_risbg() 3637 if (imask == 0 && pos == 0 && len > 0 && len <= rot) { in op_risbg() 3638 tcg_gen_extract_i64(o->out, o->in2, 64 - rot, len); in op_risbg() 3646 rot = (rot - pos) & 63; in op_risbg() 3652 tcg_gen_rotli_i64(o->in2, o->in2, rot); in op_risbg()
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