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Searched refs:reg_off (Results 1 – 4 of 4) sorted by relevance

/qemu/target/arm/tcg/
H A Dsme_helper.c443 intptr_t reg_off, reg_last; in DO_LD() local
484 reg_off = info.reg_off_first[0]; in DO_LD()
494 uint64_t pg = vg[reg_off >> 6]; in DO_LD()
496 if ((pg >> (reg_off & 63)) & 1) { in DO_LD()
497 tlb_fn(env, &scratch, reg_off, addr + reg_off, ra); in DO_LD()
499 reg_off += esize; in DO_LD()
500 } while (reg_off & 63); in DO_LD()
501 } while (reg_off <= reg_last); in DO_LD()
510 reg_off = info.reg_off_first[0]; in DO_LD()
516 } else if (reg_off) { in DO_LD()
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H A Dsve_ldst_internal.h29 typedef void sve_ldst1_host_fn(void *vd, intptr_t reg_off, void *host);
35 typedef void sve_ldst1_tlb_fn(CPUARMState *env, void *vd, intptr_t reg_off,
43 static inline void sve_##NAME##_host(void *vd, intptr_t reg_off, void *host) \
44 { TYPEM val = HOST(host); *(TYPEE *)(vd + H(reg_off)) = val; }
47 static inline void sve_##NAME##_host(void *vd, intptr_t reg_off, void *host) \
48 { TYPEM val = *(TYPEE *)(vd + H(reg_off)); HOST(host, val); }
52 intptr_t reg_off, target_ulong addr, uintptr_t ra) \
55 *(TYPEE *)(vd + H(reg_off)) = val; \
60 intptr_t reg_off, target_ulong addr, uintptr_t ra) \
62 TYPEM val = *(TYPEE *)(vd + H(reg_off)); \
H A Dsve_helper.c5509 static intptr_t find_next_active(uint64_t *vg, intptr_t reg_off, in find_next_active() argument
5513 uint64_t pg = (vg[reg_off >> 6] & pg_mask) >> (reg_off & 63); in find_next_active()
5517 return reg_off; in find_next_active()
5521 reg_off &= -64; in find_next_active()
5523 reg_off += 64; in find_next_active()
5524 if (unlikely(reg_off >= reg_max)) { in find_next_active()
5528 pg = vg[reg_off >> 6] & pg_mask; in find_next_active()
5531 reg_off += ctz64(pg); in find_next_active()
5534 tcg_debug_assert(reg_off < reg_max); in find_next_active()
5535 return reg_off; in find_next_active()
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/qemu/hw/timer/
H A Dtrace-events111 hpet_invalid_hpet_cfg(uint8_t reg_off) "invalid HPET_CFG + %u" PRIx8
113 hpet_ram_read_reading_counter(uint8_t reg_off, uint64_t cur_tick) "reading counter + %" PRIu8 " = 0…
117 hpet_ram_write_tn_cfg(uint8_t reg_off) "hpet_ram_writel HPET_TN_CFG + %" PRIu8
118 hpet_ram_write_tn_cmp(uint8_t reg_off) "hpet_ram_writel HPET_TN_CMP + %" PRIu8
122 hpet_ram_write_counter_written(uint8_t reg_off, uint64_t value, uint64_t counter) "HPET counter + %…