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Searched refs:reg_idx (Results 1 – 8 of 8) sorted by relevance

/qemu/target/arm/tcg/
H A Dneon-ls.decode47 VLDST_single 1111 0100 1 . l:1 0 rn:4 .... 00 n:2 reg_idx:3 align:1 rm:4 \
49 VLDST_single 1111 0100 1 . l:1 0 rn:4 .... 01 n:2 reg_idx:2 . align:1 rm:4 \
51 VLDST_single 1111 0100 1 . l:1 0 rn:4 .... 10 n:2 reg_idx:1 . align:2 rm:4 \
H A Dtranslate-neon.c763 neon_store_element(vd, a->reg_idx, a->size, tmp); in trans_VLDST_single()
765 neon_load_element(tmp, vd, a->reg_idx, a->size); in trans_VLDST_single()
/qemu/hw/net/can/
H A Dxlnx-zynqmp-can.c816 uint32_t reg_idx = (reg->access->addr) / 4; in can_filter_mask_pre_write() local
817 uint32_t filter_number = (reg_idx - R_AFMR1) / 2; in can_filter_mask_pre_write()
821 s->regs[reg_idx] = val; in can_filter_mask_pre_write()
823 trace_xlnx_can_filter_mask_pre_write(filter_number, s->regs[reg_idx]); in can_filter_mask_pre_write()
832 return s->regs[reg_idx]; in can_filter_mask_pre_write()
838 uint32_t reg_idx = (reg->access->addr) / 4; in can_filter_id_pre_write() local
839 uint32_t filter_number = (reg_idx - R_AFIR1) / 2; in can_filter_id_pre_write()
842 s->regs[reg_idx] = val; in can_filter_id_pre_write()
844 trace_xlnx_can_filter_id_pre_write(filter_number, s->regs[reg_idx]); in can_filter_id_pre_write()
853 return s->regs[reg_idx]; in can_filter_id_pre_write()
H A Dxlnx-versal-canfd.c1420 uint32_t reg_idx = (reg->access->addr) / 4; in filter_mask() local
1422 uint32_t filter_offset = (reg_idx - R_AFMR_REGISTER) / 2; in filter_mask()
1426 s->regs[reg_idx] = val; in filter_mask()
1434 return s->regs[reg_idx]; in filter_mask()
1440 hwaddr reg_idx = (reg->access->addr) / 4; in filter_id() local
1442 uint32_t filter_offset = (reg_idx - R_AFIR_REGISTER) / 2; in filter_id()
1446 s->regs[reg_idx] = val; in filter_id()
1454 return s->regs[reg_idx]; in filter_id()
/qemu/hw/virtio/
H A Dvhost-user.c271 int reg_idx; member
626 rem_reg[rm_idx++].reg_idx = i; in scrub_shadow_regions()
652 add_reg[add_idx].reg_idx = i; in scrub_shadow_regions()
677 shadow_reg_idx = remove_reg[i].reg_idx; in send_remove_regions()
719 int i, fd, ret, reg_idx, reg_fd_idx; in send_add_regions() local
728 reg_idx = add_reg[i].reg_idx; in send_add_regions()
740 u->region_rb_offset[reg_idx] = offset; in send_add_regions()
741 u->region_rb[reg_idx] = mr->ram_block; in send_add_regions()
782 if (reply_gpa == dev->mem->regions[reg_idx].guest_phys_addr) { in send_add_regions()
783 shadow_pcb[reg_idx] = in send_add_regions()
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/qemu/hw/ppc/
H A Dspapr_pci.c913 int i, reg_idx = 0; in populate_resource_props() local
916 reg = &rp->reg[reg_idx++]; in populate_resource_props()
928 reg = &rp->reg[reg_idx++]; in populate_resource_props()
944 rp->reg_len = reg_idx * sizeof(ResourceFields); in populate_resource_props()
/qemu/hw/net/
H A De1000e_core.c863 e1000e_mq_queue_idx(int base_reg_idx, int reg_idx) in e1000e_mq_queue_idx() argument
865 return (reg_idx - base_reg_idx) / (0x100 >> 2); in e1000e_mq_queue_idx()
H A Digb_core.c763 igb_mq_queue_idx(int base_reg_idx, int reg_idx) in igb_mq_queue_idx() argument
765 return (reg_idx - base_reg_idx) / 16; in igb_mq_queue_idx()