| /qemu/target/tricore/ |
| H A D | translate.c | 445 TCGv r3, void(*op1)(TCGv, TCGv, TCGv), in gen_addsub64_h() argument
463 (*op2)(temp3, r1_high, r3); in gen_addsub64_h()
466 tcg_gen_xor_tl(temp4, r1_high, r3); in gen_addsub64_h()
490 static inline void gen_madd32_d(TCGv ret, TCGv r1, TCGv r2, TCGv r3) in gen_madd32_d() argument
498 tcg_gen_ext_i32_i64(t3, r3); in gen_madd32_d()
529 TCGv r3) in gen_madd64_d() argument
536 tcg_gen_muls2_tl(t1, t2, r1, r3); in gen_madd64_d()
557 TCGv r3) in gen_maddu64_d() argument
565 tcg_gen_extu_i32_i64(t3, r3); in gen_maddu64_d()
603 TCGv r3, uint32_t n, uint32_t mode) in gen_madd_h() argument
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| /qemu/tests/qtest/migration/ppc64/ |
| H A D | a-b-kernel.S | 12 li %r3,PPC_H_PUT_TERM_CHAR
49 li %r3,0
52 1: stb %r3,0(%r9)
59 1: lbz %r3,0(%r9)
60 addi %r3,%r3,1
61 stb %r3,0(%r9)
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| /qemu/pc-bios/s390-ccw/ |
| H A D | start.S | 24 larl %r3,_end
25 slgr %r3,%r2 /* get sizeof bss */
26 ltgr %r3,%r3 /* bss empty? */
28 aghi %r3,-1
29 srlg %r4,%r3,8 /* how many 256 byte chunks? */
39 ex %r3,0(%r2)
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| /qemu/tests/tcg/hexagon/ |
| H A D | test_packet.S | 15 r3 = #6 define
21 r3 = memw(sp+#0) define
22 r0 = add(r2, r3)
26 p0 = cmp.eq(r3, #4)
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| H A D | test_fibonacci.S | 14 r3 = #0 define
23 r4 = add(r3, r4)
24 r3 = r5 define
28 p0 = cmp.eq(r3, #144); if (p0.new) jump:t pass
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| H A D | test_abs.S | 12 r3 = abs(r1) define
15 p0 = cmp.eq(r3, r2); if (p0.new) jump:t pass
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| H A D | test_mpyi.S | 12 r3 = mpyi(r1, r2) define
15 p0 = cmp.eq(r3, #24); if (p0.new) jump:t pass
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| H A D | test_vcmpb.S | 19 r3 = #0x12345678 define
22 p2 = vcmpb.eq(r1:0, r3:2)
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| H A D | test_vcmpw.S | 19 r3 = #0x12345678 define
22 p2 = vcmpw.eq(r1:0, r3:2)
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| H A D | test_bitsplit.S | 11 r3:2 = bitsplit(r1, #3)
20 p0 = cmp.eq(r3, #23); if (p0.new) jump:t pass
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| H A D | test_vmaxh.S | 21 r3 = #196610 define
24 r1:0 = vmaxh(r1:0, r3:2)
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| H A D | test_vminh.S | 21 r3 = #196610 define
24 r1:0 = vminh(r1:0, r3:2)
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| /qemu/tcg/ |
| H A D | tci.c | 163 TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGReg *r3) in tci_args_rrrr() argument
168 *r3 = extract32(insn, 20, 4); in tci_args_rrrr()
172 TCGReg *r2, TCGReg *r3, TCGReg *r4, TCGCond *c5) in tci_args_rrrrrc() argument
177 *r3 = extract32(insn, 20, 4); in tci_args_rrrrrc()
350 TCGReg r0, r1, r2, r3, r4; in tcg_qemu_tb_exec() local
423 tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); in tcg_qemu_tb_exec()
425 tci_uint64(regs[r4], regs[r3]), in tcg_qemu_tb_exec()
434 tci_args_rrrrrc(insn, &r0, &r1, &r2, &r3, &r4, &condition); in tcg_qemu_tb_exec()
436 regs[r0] = regs[tmp32 ? r3 : r4]; in tcg_qemu_tb_exec()
597 tci_args_rrrr(insn, &r0, &r1, &r2, &r3); in tcg_qemu_tb_exec()
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| /qemu/target/s390x/tcg/ |
| H A D | translate.c | 1563 int r3 = get_field(s, r3); in op_bx32() local
1573 tcg_gen_add_i64(t, regs[r1], regs[r3]); in op_bx32()
1577 tcg_gen_extrl_i64_i32(c.u.s32.b, regs[r3 | 1]); in op_bx32()
1587 int r3 = get_field(s, r3); in op_bx64() local
1595 if (r1 == (r3 | 1)) { in op_bx64()
1596 c.u.s64.b = load_reg(r3 | 1); in op_bx64()
1598 c.u.s64.b = regs[r3 | 1]; in op_bx64()
1601 tcg_gen_add_i64(regs[r1], regs[r1], regs[r3]); in op_bx64()
1954 int r3 = get_field(s, r3); in op_clcle() local
1958 if (r1 & 1 || r3 & 1) { in op_clcle()
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| H A D | mem_helper.c | 1015 void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) in HELPER()
1028 if (i == r3) { in HELPER()
1035 void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t r3) in HELPER()
1048 if (i == r3) { in HELPER()
1192 uint32_t r3) in HELPER()
1197 uint64_t srclen = get_length(env, r3 + 1); in HELPER()
1198 uint64_t src = get_address(env, r3); in HELPER()
1205 set_length(env, r3 + 1, srclen); in HELPER()
1207 set_address(env, r3, src); in HELPER()
1214 uint32_t r3) in HELPER()
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| /qemu/tests/tcg/s390x/ |
| H A D | cdsg.c | 26 register unsigned long r3 asm("r3"); in cdsg()
32 r3 = new1; in cdsg()
40 , [r3] "r" (r3) in cdsg()
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| H A D | vstl.c | 10 static inline void vstl(S390Vector *v1, void *db2, size_t r3) in vstl() argument
14 : [v1] "v" (v1->v), [r3] "r" (r3) in vstl()
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| H A D | shift.c | 32 register uint32_t r3 asm("3") = op1l; \
40 [r3] "+&r" (r3), \
45 op1l = r3; \
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| /qemu/pc-bios/vof/ |
| H A D | main.c | 5 register unsigned long r3 __asm__("r3") = _r3; in do_boot()
14 register unsigned long r3 __asm__("r3"); in entry_c()
17 uint64_t initrd = r3, initrdsize = r4; in entry_c()
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| /qemu/tests/tcg/arm/system/ |
| H A D | boot.S | 110 mov r3, #0
112 orr r3, r4, r4
115 orr r3, r3, #2
124 orr r2, r2, r3 /* common bits */
135 orr r2, r2, r3 /* common bits */
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| /qemu/linux-user/arm/ |
| H A D | vdso.S | 38 ldr r3, [sp, #\ofs]
39 ldmia r2, {r2, r3}
40 mov r9, r3
125 .cfi_offset r3, -13 * 4
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| /qemu/tests/tcg/xtensa/ |
| H A D | fpu.h | 103 .macro test_op1 op, fr0, fr1, v0, r0, r1, r2, r3, sr0, sr1, sr2, sr3
107 test_op1_ex \op, \fr0, \fr1, \v0, 3, \r3, \sr3
110 .macro test_op2 op, fr0, fr1, fr2, v0, v1, r0, r1, r2, r3, sr0, sr1, sr2, sr3
114 test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 3, \r3, \sr3
117 .macro test_op3 op, fr0, fr1, fr2, fr3, v0, v1, v2, r0, r1, r2, r3, sr0, sr1, sr2, sr3
121 test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 3, \r3, \sr3
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| /qemu/target/mips/tcg/ |
| H A D | octeon.decode | 31 @r3 ...... rs:5 rt:5 rd:5 ..... ......
35 BADDU 011100 ..... ..... ..... 00000 101000 @r3
36 DMUL 011100 ..... ..... ..... 00000 000011 @r3
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| /qemu/target/s390x/ |
| H A D | diag.c | 28 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3) in handle_diag_288() argument
32 uint64_t action = env->regs[r3]; in handle_diag_288()
76 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra) in handle_diag_308() argument
82 uint64_t subcode = env->regs[r3]; in handle_diag_308()
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| /qemu/qapi/ |
| H A D | cxl.json | 34 # Inject an event record for a General Media Event (CXL r3.0
42 # @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event
46 # lower bits include some flags. See CXL r3.0 Table 8-43 General
50 # information. See CXL r3.0 Table 8-43 General Media Event
53 # @type: Type of memory event that occurred. See CXL r3.0 Table 8-43
58 # to occur. See CXL r3.0 Table 8-43 General Media Event Record,
85 # Inject an event record for a DRAM Event (CXL r3.0 8.2.9.2.1.2).
93 # @flags: Event Record Flags. See CXL r3.0 Table 8-42 Common Event
97 # lower bits include some flags. See CXL r3.0 Table 8-44 DRAM
101 # information. See CXL r3.0 Table 8-44 DRAM Event Record, Memory
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