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Searched refs:priv_ver (Results 1 – 10 of 10) sorted by relevance

/qemu/target/riscv/tcg/
H A Dtcg-cpu.c87 static const char *cpu_priv_ver_to_str(int priv_ver) in cpu_priv_ver_to_str() argument
89 const char *priv_spec_str = priv_spec_to_str(priv_ver); in cpu_priv_ver_to_str()
367 if (env->priv_ver == PRIV_VERSION_LATEST) { in cpu_bump_multi_ext_priv_ver()
373 if (env->priv_ver < ext_priv_ver) { in cpu_bump_multi_ext_priv_ver()
378 env->priv_ver = ext_priv_ver; in cpu_bump_multi_ext_priv_ver()
397 if (value && env->priv_ver != PRIV_VERSION_LATEST) { in cpu_cfg_ext_auto_update()
400 if (env->priv_ver < min_version) { in cpu_cfg_ext_auto_update()
410 if (riscv_has_ext(env, RVH) && env->priv_ver < PRIV_VERSION_1_12_0) { in riscv_cpu_validate_misa_priv()
444 (env->priv_ver < edata->min_version)) { in riscv_cpu_disable_priv_spec_isa_exts()
479 if (cpu->env.priv_ver >= PRIV_VERSION_1_11_0) { in riscv_cpu_update_named_features()
[all …]
/qemu/target/riscv/
H A Dfpu_helper.c249 return nanbox_s(env, env->priv_ver < PRIV_VERSION_1_11_0 ? in helper_fmin_s()
266 return nanbox_s(env, env->priv_ver < PRIV_VERSION_1_11_0 ? in helper_fmax_s()
416 return env->priv_ver < PRIV_VERSION_1_11_0 ? in helper_fmin_d()
428 return env->priv_ver < PRIV_VERSION_1_11_0 ? in helper_fmax_d()
582 return nanbox_h(env, env->priv_ver < PRIV_VERSION_1_11_0 ? in helper_fmin_h()
599 return nanbox_h(env, env->priv_ver < PRIV_VERSION_1_11_0 ? in helper_fmax_h()
H A Dop_helper.c285 env->priv_ver, in helper_sret()
319 if (env->priv_ver >= PRIV_VERSION_1_12_0) { in helper_sret()
365 env->priv_ver, in check_ret_from_m_mode()
414 if ((env->priv_ver >= PRIV_VERSION_1_12_0) && (prev_priv != PRV_M)) { in helper_mret()
H A Dcpu.h229 target_ulong priv_ver; member
791 target_long priv_ver, in riscv_cpu_allow_16bit_insn() argument
795 if (priv_ver >= PRIV_VERSION_1_12_0) { in riscv_cpu_allow_16bit_insn()
H A Dmachine.c287 return (env->priv_ver >= PRIV_VERSION_1_12_0 ? 1 : 0); in envcfg_needed()
418 VMSTATE_UINTTL(env.priv_ver, RISCVCPU),
H A Dtranslate.c60 target_ulong priv_ver; member
609 ctx->priv_ver, in gen_jal()
1266 ctx->priv_ver = env->priv_ver; in riscv_tr_init_disas_context()
H A Dgdbstub.c279 if (env->priv_ver < csr_ops[i].min_priv_ver) { in riscv_gen_dynamic_csr_feature()
H A Dcpu.c1131 cpu->env.priv_ver = mcc->def->priv_spec; in riscv_cpu_init()
1619 if (priv_version != cpu->env.priv_ver && riscv_cpu_is_vendor(obj)) { in prop_priv_spec_set()
1627 cpu->env.priv_ver = priv_version; in prop_priv_spec_set()
1634 const char *value = priv_spec_to_str(cpu->env.priv_ver); in prop_priv_spec_get()
H A Dcsr.c3414 if (env->priv_ver >= PRIV_VERSION_1_13_0) { in write_mstateen0()
3470 if (env->priv_ver >= PRIV_VERSION_1_13_0) { in write_mstateen0h()
5489 if (env->priv_ver < csr_min_priv) { in riscv_csrrw_check()
/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc155 ctx->priv_ver,
306 ctx->priv_ver,