/qemu/target/arm/tcg/ |
H A D | sve.decode | 106 # Two operand with governing predicate, flags setting 113 # Three predicate operand, with governing predicate, flag setting 143 # Two register operand, with governing predicate, vector element size 151 # Three register operand, with governing predicate, vector element size 160 # One register operand, with governing predicate, vector element size 165 # One register operand, with governing predicate, no vector element size 171 # Two register operand, one immediate operand, with predicate, 178 # Similarly without predicate. 184 # Two register operand, one immediate operand, with 4-bit predicate. 198 # controlling predicate, element size. [all …]
|
/qemu/target/riscv/ |
H A D | gdbstub.c | 260 riscv_csr_predicate_fn predicate; in riscv_gen_dynamic_csr_feature() local 282 predicate = csr_ops[i].predicate; in riscv_gen_dynamic_csr_feature() 283 if (predicate && (predicate(env, i) == RISCV_EXCP_NONE)) { in riscv_gen_dynamic_csr_feature()
|
H A D | cpu.h | 889 riscv_csr_predicate_fn predicate; member
|
H A D | csr.c | 5484 if (!csr_ops[csrno].predicate) { in riscv_csrrw_check() 5505 RISCVException ret = csr_ops[csrno].predicate(env, csrno); in riscv_csrrw_check()
|
/qemu/target/hexagon/imported/ |
H A D | compare.idef | 200 "Logical ANY of low 8 predicate bits", 204 "Logical ALL of low 8 predicate bits", 208 "Pack the odd and even bits of two predicate registers", 592 "Transfer predicate to general register", { RdV = fZXTN(8,32,PsV); }) 598 "Determine whether the predicate sources define a corner", 610 "Determine whether the predicate sources define a corner",
|
H A D | branch.idef | 278 /* V2: With predicate control */ 306 /* V2: With predicate control */
|
/qemu/target/hexagon/ |
H A D | README | 209 predicate registers. 272 new_pred_value new value of a predicate register 273 pred_written boolean indicating if predicate was written 280 QRegs Q (vector predicate) registers
|
H A D | attribs_def.h.inc | 93 DEF_ATTRIB(CONDEXEC, "May be cancelled by a predicate", "", "") 165 DEF_ATTRIB(NOTE_LATEPRED, "The predicate can not be used as a .new", "", "")
|
/qemu/include/hw/acpi/ |
H A D | aml-build.h | 390 Aml *aml_if(Aml *predicate); 392 Aml *aml_while(Aml *predicate);
|
/qemu/hw/acpi/ |
H A D | aml-build.c | 1099 Aml *aml_if(Aml *predicate) in aml_if() argument 1102 aml_append(var, predicate); in aml_if() 1114 Aml *aml_while(Aml *predicate) in aml_while() argument 1117 aml_append(var, predicate); in aml_while()
|
/qemu/target/hexagon/idef-parser/ |
H A D | README.rst | 233 output predicate register P0 235 input predicate register in P0
|
/qemu/target/hexagon/imported/mmvec/ |
H A D | ext.idef | 1722 …",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" greater than with predicate-and", \ 1724 … ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" greater than with predicate-or", \ 1726 …",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" greater than with predicate-xor", \ 1733 …YPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" equalto with predicate-and", \ 1735 …TYPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" equalto with predicate-or", \ 1737 …YPE2 ",Vv32." TYPE2 ")", ATTRIBS(A_EXTENSION,A_CVI,A_CVI_VA), DESCR" equalto with predicate-xor", \
|