Home
last modified time | relevance | path

Searched refs:ppr (Results 1 – 6 of 6) sorted by relevance

/qemu/hw/misc/
H A Dnpcm7xx_pwm.c73 uint32_t ppr; in npcm7xx_pwm_calculate_freq() local
82 ppr = NPCM7XX_PPR(p->module->ppr, p->index); in npcm7xx_pwm_calculate_freq()
84 freq /= ppr + 1; in npcm7xx_pwm_calculate_freq()
155 uint32_t old_ppr = s->ppr; in npcm7xx_pwm_write_ppr()
158 s->ppr = new_ppr; in npcm7xx_pwm_write_ppr()
320 value = s->ppr; in npcm7xx_pwm_read()
464 s->ppr = 0x00000000; in npcm7xx_pwm_enter_reset()
537 VMSTATE_UINT32(ppr, NPCM7xxPWMState),
/qemu/tests/qtest/
H A Dnpcm7xx_pwm-test.c337 static uint64_t pwm_compute_freq(QTestState *qts, uint32_t ppr, uint32_t csr, in pwm_compute_freq() argument
340 return read_pclk(qts, false) / ((ppr + 1) * pwm_selector(csr) * (cnr + 1)); in pwm_compute_freq()
575 uint32_t ppr, csr, pcr; in test_oneshot() local
580 ppr = ppr_list[i]; in test_oneshot()
581 pwm_write_ppr(qts, td, ppr); in test_oneshot()
588 g_assert_cmpuint(pwm_read_ppr(qts, td), ==, ppr); in test_oneshot()
606 uint32_t ppr, csr, pcr, cnr, cmr; in test_toggle() local
615 ppr = ppr_list[i]; in test_toggle()
616 pwm_write_ppr(qts, td, ppr); in test_toggle()
629 expected_freq = pwm_compute_freq(qts, ppr, csr, cnr); in test_toggle()
[all …]
/qemu/hw/intc/
H A Dapic.c410 int tpr, isrv, ppr; in apic_get_ppr() local
418 ppr = s->tpr; in apic_get_ppr()
420 ppr = isrv << 4; in apic_get_ppr()
421 return ppr; in apic_get_ppr()
438 int irrv, ppr; in apic_irq_pending() local
448 ppr = apic_get_ppr(s); in apic_irq_pending()
449 if (ppr && (irrv & 0xf0) <= (ppr & 0xf0)) { in apic_irq_pending()
/qemu/include/hw/misc/
H A Dnpcm7xx_pwm.h96 uint32_t ppr; member
/qemu/include/hw/ppc/
H A Dspapr_nested.h438 uint64_t ppr; member
492 uint64_t ppr; member
/qemu/hw/ppc/
H A Dspapr_nested.c164 save->ppr = env->spr[SPR_PPR]; in nested_save_state()
263 env->spr[SPR_PPR] = load->ppr; in nested_load_state()
423 l2_state.ppr = hv_state.ppr; in h_enter_nested()
525 hvstate->ppr = l2_state.ppr; in spapr_exit_nested_hv()
915 GUEST_STATE_ELEMENT_ENV_DW(GSB_VCPU_SPR_PPR, ppr),