Searched refs:pmp (Results 1 – 11 of 11) sorted by relevance
/qemu/target/riscv/ |
H A D | pmp.c | 58 if (env->pmp_state.pmp[pmp_index].cfg_reg & PMP_LOCK) { in pmp_is_locked() 126 return env->pmp_state.pmp[pmp_index].cfg_reg; in pmp_read_cfg() 140 if (env->pmp_state.pmp[pmp_index].cfg_reg == val) { in pmp_write_cfg() 152 env->pmp_state.pmp[pmp_index].cfg_reg = val; in pmp_write_cfg() 170 env->pmp_state.pmp[i].cfg_reg &= ~(PMP_LOCK | PMP_AMATCH); in pmp_unlock_entries() 193 uint8_t this_cfg = env->pmp_state.pmp[pmp_index].cfg_reg; in pmp_update_rule_addr() 194 target_ulong this_addr = env->pmp_state.pmp[pmp_index].addr_reg; in pmp_update_rule_addr() 200 prev_addr = env->pmp_state.pmp[pmp_index - 1].addr_reg; in pmp_update_rule_addr() 243 pmp_get_a_field(env->pmp_state.pmp[i].cfg_reg); in pmp_update_rule_nums() 297 if (!riscv_cpu_cfg(env)->pmp || (mode == PRV_M)) { in pmp_hart_has_privs_default() [all …]
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H A D | meson.build | 31 'pmp.c',
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H A D | pmp.h | 63 pmp_entry_t pmp[MAX_RISCV_PMPS]; member
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H A D | trace-events | 4 # pmp.c
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H A D | csr.c | 738 static RISCVException pmp(CPURISCVState *env, int csrno) in pmp() function 740 if (riscv_cpu_cfg(env)->pmp) { in pmp() 6110 [CSR_PMPCFG0] = { "pmpcfg0", pmp, read_pmpcfg, write_pmpcfg }, 6111 [CSR_PMPCFG1] = { "pmpcfg1", pmp, read_pmpcfg, write_pmpcfg }, 6112 [CSR_PMPCFG2] = { "pmpcfg2", pmp, read_pmpcfg, write_pmpcfg }, 6113 [CSR_PMPCFG3] = { "pmpcfg3", pmp, read_pmpcfg, write_pmpcfg }, 6114 [CSR_PMPADDR0] = { "pmpaddr0", pmp, read_pmpaddr, write_pmpaddr }, 6115 [CSR_PMPADDR1] = { "pmpaddr1", pmp, read_pmpaddr, write_pmpaddr }, 6116 [CSR_PMPADDR2] = { "pmpaddr2", pmp, read_pmpaddr, write_pmpaddr }, 6117 [CSR_PMPADDR3] = { "pmpaddr3", pmp, read_pmpaddr, write_pmpaddr }, [all …]
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H A D | cpu.c | 1547 if (cpu->cfg.pmp != value && riscv_cpu_is_vendor(obj)) { in prop_pmp_set() 1553 cpu->cfg.pmp = value; in prop_pmp_set() 1559 bool value = RISCV_CPU(obj)->cfg.pmp; in prop_pmp_get() 2893 .cfg.pmp = true, 2940 .cfg.pmp = true 2951 .cfg.pmp = true 2968 .cfg.pmp = true, 3042 .cfg.pmp = true, 3065 .cfg.pmp = true, 3121 .cfg.pmp = true, [all …]
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H A D | machine.c | 31 return cpu->cfg.pmp; in pmp_needed() 66 VMSTATE_STRUCT_ARRAY(env.pmp_state.pmp, RISCVCPU, MAX_RISCV_PMPS,
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H A D | cpu_cfg_fields.h.inc | 150 BOOL_FIELD(pmp)
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H A D | op_helper.c | 370 if (riscv_cpu_cfg(env)->pmp && in check_ret_from_m_mode()
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H A D | cpu_helper.c | 1099 if (!riscv_cpu_cfg(env)->pmp) { in get_physical_address_pmp()
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/qemu/target/riscv/tcg/ |
H A D | tcg-cpu.c | 1114 if (cpu->cfg.ext_smepmp && !cpu->cfg.pmp) { in riscv_tcg_cpu_finalize_features()
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