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Searched refs:pio (Results 1 – 19 of 19) sorted by relevance

/qemu/system/
H A Dioport.c281 const MemoryRegionPortio *pio, *pio_start = piolist->ports; in portio_list_add() local
292 for (pio = pio_start + 1; pio->size != 0; pio++, count++) { in portio_list_add()
294 assert(pio->offset >= off_last); in portio_list_add()
295 off_last = pio->offset; in portio_list_add()
302 pio_start = pio; in portio_list_add()
304 off_high = off_low + pio->len + pio_start->size - 1; in portio_list_add()
306 } else if (off_last + pio->len > off_high) { in portio_list_add()
307 off_high = off_last + pio->len + pio_start->size - 1; in portio_list_add()
/qemu/tests/qtest/libqos/
H A Dahci.c39 bool pio; member
52 { .cmd = CMD_READ_PIO, .data = true, .pio = true,
54 { .cmd = CMD_WRITE_PIO, .data = true, .pio = true,
56 { .cmd = CMD_READ_PIO_EXT, .data = true, .pio = true,
58 { .cmd = CMD_WRITE_PIO_EXT, .data = true, .pio = true,
68 { .cmd = CMD_IDENTIFY, .data = true, .pio = true,
78 .atapi = true, .pio = true },
79 { .cmd = CMD_PACKET_ID, .data = true, .pio = true,
535 PIOSetupFIS *pio = g_malloc0(0x20); in ahci_port_check_pio_sanity() local
541 qtest_memread(ahci->parent->qts, ahci->port[port].fb + 0x20, pio, 0x20); in ahci_port_check_pio_sanity()
[all …]
H A Dpci-spapr.h30 QPCIWindow pio; member
H A Dpci-spapr.c190 qpci->pio.pci_base = 0; in qpci_init_spapr()
191 qpci->pio.size = SPAPR_PCI_IO_WIN_SIZE; in qpci_init_spapr()
/qemu/hw/pci-host/
H A Dgpex-acpi.c189 cfg->pio.base, 0, 0, 0); in acpi_dsdt_add_gpex()
241 if (cfg->pio.size) { in acpi_dsdt_add_gpex()
244 cfg->pio.size - 1); in acpi_dsdt_add_gpex()
250 entry->limit, cfg->pio.base, in acpi_dsdt_add_gpex()
H A Dppce500.c111 MemoryRegion pio; member
460 memory_region_init(&s->pio, OBJECT(s), "pci-pio", PCIE500_PCI_IOLEN); in e500_pcihost_realize()
464 memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2); in e500_pcihost_realize()
467 mpc85xx_pci_map_irq, s, &s->busmem, &s->pio, in e500_pcihost_realize()
H A Dgpex.c182 DEFINE_PROP_UINT64(PCI_HOST_PIO_BASE, GPEXHost, gpex_cfg.pio.base, 0),
183 DEFINE_PROP_SIZE(PCI_HOST_PIO_SIZE, GPEXHost, gpex_cfg.pio.size, 0),
/qemu/include/hw/pci-host/
H A Dgpex.h45 MemMapEntry pio; member
/qemu/hw/core/
H A Dsysbus.c194 dev->pio[dev->num_pio++] = ioport++; in sysbus_init_ioports()
278 return g_strdup_printf("%s@i%04x", qdev_fw_name(dev), s->pio[0]); in sysbus_get_fw_dev_path()
/qemu/include/hw/
H A Dsysbus.h67 uint32_t pio[QDEV_MAX_PIO]; member
/qemu/hw/xen/
H A Dtrace-events51 …_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d…
52 cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg…
53 cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write r…
/qemu/hw/loongarch/
H A Dvirt-acpi-build.c390 .pio.base = VIRT_PCI_IO_BASE, in build_pci_device_aml()
391 .pio.size = VIRT_PCI_IO_SIZE, in build_pci_device_aml()
/qemu/linux-headers/linux/
H A Dkvm.h472 __u32 pio; member
481 __u32 pio; member
/qemu/hw/pci-bridge/
H A Dpci_expander_bridge.c167 main_host_sbd->pio[0], position + 1); in pxb_host_ofw_unit_address()
/qemu/include/hw/ppc/
H A Dspapr.h160 uint64_t *buid, hwaddr *pio,
/qemu/docs/devel/migration/
H A Dmain.rst325 Here we have a subsection for the pio state. We only need to
326 save/send this state when we are in the middle of a pio operation
/qemu/hw/ppc/
H A Dspapr.c4388 uint64_t *buid, hwaddr *pio, in spapr_phb_placement() argument
4432 *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE; in spapr_phb_placement()
5012 uint64_t *buid, hwaddr *pio, in phb_placement_4_0() argument
5016 if (!spapr_phb_placement(spapr, index, buid, pio, mmio32, mmio64, n_dma, in phb_placement_4_0()
/qemu/hw/arm/
H A Dvirt-acpi-build.c128 .pio = memmap[VIRT_PCIE_PIO], in acpi_dsdt_add_pci()
/qemu/accel/kvm/
H A Dkvm-all.c1237 zone.pio = 1; in kvm_coalesce_pio_add()
1254 zone.pio = 1; in kvm_coalesce_pio_del()
2862 if (ent->pio == 1) { in kvm_flush_coalesced_mmio_buffer()