Home
last modified time | relevance | path

Searched refs:out_rr (Results 1 – 11 of 11) sorted by relevance

/qemu/tcg/tci/
H A Dtcg-target.c.inc370 .out_rr = tcg_out_extract,
381 .out_rr = tcg_out_sextract,
665 .out_rr = tgen_extrh_i64_i32,
934 .out_rr = tgen_ctpop,
948 .out_rr = tgen_bswap16,
962 .out_rr = tgen_bswap32,
973 .out_rr = tgen_bswap64,
984 .out_rr = tgen_neg,
994 .out_rr = tgen_not,
1032 .out_rr = tgen_brcond,
/qemu/tcg/loongarch64/
H A Dtcg-target.c.inc801 .out_rr = tgen_brcond,
1537 .out_rr = tgen_extrh_i64_i32,
1838 .out_rr = tgen_bswap16,
1856 .out_rr = tgen_bswap32,
1866 .out_rr = tgen_bswap64,
1876 .out_rr = tgen_neg,
1886 .out_rr = tgen_not,
1918 .out_rr = tgen_extract,
1945 .out_rr = tgen_sextract,
/qemu/tcg/riscv/
H A Dtcg-target.c.inc1151 .out_rr = tgen_brcond,
2071 .out_rr = tgen_ctpop,
2146 .out_rr = tgen_extrh_i64_i32,
2436 .out_rr = tgen_bswap16,
2453 .out_rr = tgen_bswap32,
2464 .out_rr = tgen_bswap64,
2474 .out_rr = tgen_neg,
2484 .out_rr = tgen_not,
2517 .out_rr = tgen_extract,
2544 .out_rr = tgen_sextract,
/qemu/tcg/mips/
H A Dtcg-target.c.inc921 .out_rr = tgen_brcond,
1858 .out_rr = tgen_extrh_i64_i32,
2220 .out_rr = tgen_bswap16,
2246 .out_rr = tgen_bswap32,
2265 .out_rr = tgen_bswap64,
2276 .out_rr = tgen_neg,
2286 .out_rr = tgen_not,
2320 .out_rr = tgen_extract,
2344 .out_rr = tgen_sextract,
/qemu/tcg/sparc64/
H A Dtcg-target.c.inc865 .out_rr = tgen_brcond,
1532 .out_rr = tgen_ctpop,
1625 .out_rr = tgen_extrh_i64_i32,
1957 .out_rr = tgen_neg,
1967 .out_rr = tgen_not,
1983 .out_rr = tgen_extract,
1995 .out_rr = tgen_sextract,
/qemu/tcg/s390x/
H A Dtcg-target.c.inc1637 .out_rr = tgen_extract,
1661 .out_rr = tgen_sextract,
1784 .out_rr = tgen_brcondr,
2503 .out_rr = tgen_ctpop,
2580 .out_rr = tgen_extrh_i64_i32,
2994 .out_rr = tgen_bswap16,
3010 .out_rr = tgen_bswap32,
3020 .out_rr = tgen_bswap64,
3034 .out_rr = tgen_neg,
3050 .out_rr = tgen_not,
/qemu/tcg/
H A Dtcg.c1006 void (*out_rr)(TCGContext *s, TCGType type, TCGCond cond, member
1021 void (*out_rr)(TCGContext *s, TCGType type, member
1043 void (*out_rr)(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1, member
1086 void (*out_rr)(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1); member
1141 .out_rr = tgen_exts_i32_i64,
1151 .out_rr = tgen_extu_i32_i64,
1161 .out_rr = TCG_TARGET_HAS_extr_i64_i32 ? tgen_extrl_i64_i32 : NULL,
5701 out->out_rr(s, type, new_args[0], new_args[1]); in tcg_reg_alloc_op()
5712 out->out_rr(s, type, new_args[0], new_args[1], new_args[2]); in tcg_reg_alloc_op()
5757 out->out_rr(s, type, new_args[0], new_args[1], in tcg_reg_alloc_op()
[all …]
/qemu/tcg/aarch64/
H A Dtcg-target.c.inc1506 .out_rr = tgen_brcond,
2283 .out_rr = tgen_extrh_i64_i32,
2610 .out_rr = tgen_bswap16,
2624 .out_rr = tgen_bswap32,
2634 .out_rr = tgen_bswap64,
2644 .out_rr = tgen_neg,
2654 .out_rr = tgen_not,
2776 .out_rr = tgen_extract,
2787 .out_rr = tgen_sextract,
/qemu/tcg/ppc/
H A Dtcg-target.c.inc2037 .out_rr = tgen_brcond,
3075 .out_rr = tgen_ctpop,
3118 .out_rr = tgen_extrh_i64_i32,
3555 .out_rr = tgen_bswap16,
3596 .out_rr = tgen_bswap32,
3640 .out_rr = tgen_bswap64,
3651 .out_rr = tgen_neg,
3661 .out_rr = tgen_not,
3700 .out_rr = tgen_extract,
3727 .out_rr = tgen_sextract,
/qemu/tcg/i386/
H A Dtcg-target.c.inc1667 .out_rr = tgen_brcond,
2886 .out_rr = tgen_ctpop,
2968 .out_rr = tgen_extrh_i64_i32,
3305 .out_rr = tgen_bswap16,
3319 .out_rr = tgen_bswap32,
3330 .out_rr = tgen_bswap64,
3342 .out_rr = tgen_neg,
3353 .out_rr = tgen_not,
3432 .out_rr = tgen_extract,
3464 .out_rr = tgen_sextract,
/qemu/tcg/arm/
H A Dtcg-target.c.inc1031 .out_rr = tgen_extract,
1063 .out_rr = tgen_sextract,
2382 .out_rr = tgen_bswap16,
2394 .out_rr = tgen_bswap32,
2408 .out_rr = tgen_neg,
2418 .out_rr = tgen_not,
2437 .out_rr = tgen_brcond,