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/qemu/docs/system/devices/
H A Dvirtio-gpu.rst33 into VGA and non-VGA variants. The VGA ones are prefixed with virtio-vga
34 or vhost-user-vga while the non-VGA ones are prefixed with virtio-gpu or
37 The VGA ones always use the PCI interface, but for the non-VGA ones, the
/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc1094 TCGv ones = tcg_constant_tl(-1);
1096 return do_csrrw(ctx, a->rd, a->csr, ones, mask);
1102 TCGv ones = tcg_constant_tl(-1);
1105 return do_csrrw_i128(ctx, a->rd, a->csr, ones, ones, maskl, maskh);
1184 TCGv ones = tcg_constant_tl(-1);
1186 return do_csrrw(ctx, a->rd, a->csr, ones, mask);
1192 TCGv ones = tcg_constant_tl(-1);
1194 return do_csrrw_i128(ctx, a->rd, a->csr, ones, ones, mask, ctx->zero);
/qemu/docs/devel/migration/
H A Dcompatibility.rst37 start with the trivial ones, QEMU is the same on source and
50 This are the easiest ones, we will not talk more about them in this
70 Now it comes the interesting ones, when both QEMU processes are
310 the device needs a way to configure which ones it is going to use.
359 The relevant bits of the commit for our example are this ones::
471 Now the interesting ones. When the QEMU processes versions are
478 This two are the ones that work. The whole point of making the
H A Dvfio.rst29 the device, but the device can respond to incoming ones. Additionally, all
/qemu/docs/specs/
H A Dacpi_hw_reduced_hotplug.rst7 events, including the hotplug ones. GED is modelled as a device
H A Dppc-xive.rst135 acknowledgment among other things. The most important ones being :
H A Dfw_cfg.rst163 items, and up to 0x4000 architecturally specific ones.
/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc748 ones = tcg_constant_vec_matching(vrb, vece, -1);
763 tcg_gen_shrv_vec(vece, t0, ones, t0);
764 tcg_gen_shrv_vec(vece, t1, ones, t1);
948 ones = tcg_constant_i64(-1);
957 tcg_gen_movcond_i64(TCG_COND_NE, t1, t0, zero, zero, ones);
960 tcg_gen_shr_i64(ml, ones, t0);
968 tcg_gen_movcond_i64(TCG_COND_NE, t1, t0, zero, zero, ones);
971 tcg_gen_shr_i64(tl, ones, t0);
986 tcg_gen_movcond_i64(TCG_COND_GT, t0, b, e, ones, zero);
2219 ones = tcg_constant_i64(-1),
[all …]
/qemu/net/
H A Dvmnet-common.m195 * write left ones in temporary buffer and only after this
240 /* And read new ones from vmnet if VmnetState buffer is ready */
/qemu/target/hexagon/
H A Dgenptr.c459 TCGv ones = tcg_constant_tl(0xff); in gen_8bitsof() local
460 tcg_gen_movcond_tl(TCG_COND_NE, result, value, zero, ones, zero); in gen_8bitsof()
1294 TCGv_i64 ones = tcg_constant_i64(~0); in vec_to_qvec() local
1302 tcg_gen_movcond_i64(TCG_COND_NE, bits, word, zero, ones, zero); in vec_to_qvec()
/qemu/docs/devel/testing/
H A Dci-runners.rst.inc8 ones provided by GitLab as "shared runners".
H A Dfuzzing.rst61 write new ones to the first one specified.
/qemu/docs/system/arm/
H A Dmps2.rst78 with the third UART being the first of the shared ones.)
/qemu/docs/
H A Dthrottle.txt56 mandatory, so we must set to 0 the ones that we don't want to limit:
147 request instead of several smaller ones.
H A Dimage-fuzzer.txt111 of bits are set to ones. All fuzzed values are checked on non-equality to the
/qemu/target/hppa/
H A Dtranslate.c1039 uint64_t ones = 0, sgns = 0; in do_unit_zero_cond() local
1044 ones = d_repl; in do_unit_zero_cond()
1049 ones = d_repl * 0x01010101u; in do_unit_zero_cond()
1050 sgns = ones << 7; in do_unit_zero_cond()
1053 ones = d_repl * 0x00010001u; in do_unit_zero_cond()
1054 sgns = ones << 15; in do_unit_zero_cond()
1057 if (ones == 0) { in do_unit_zero_cond()
1067 tcg_gen_subi_i64(tmp, res, ones); in do_unit_zero_cond()
/qemu/docs/system/
H A Dreplay.rst73 events (e.g. keyboard input) and simulating deterministic ones (e.g. reading
/qemu/docs/devel/
H A Dmulti-process.rst368 read-only, but certain registers (especially BAR and MSI-related ones)
378 methods with ones that forward these operations to the emulation
718 device type. *KVM\_DEV\_TYPE\_USER* ones will need several commands:
948 emulation ones from accessing guest disk images. Similarly, network
H A Dkconfig.rst202 board (and not ones which are very board-specific or that need
H A Dloads-stores.rst335 These functions are the primary ones to use when emulating CPU
H A Dmemory.rst363 emulated using the ones available. For example a 4-byte write will be
/qemu/target/arm/tcg/
H A Dgengvec.c319 TCGv_vec ones = tcg_constant_vec_matching(d, vece, 1); in gen_srshr_vec() local
322 tcg_gen_and_vec(vece, t, t, ones); in gen_srshr_vec()
513 TCGv_vec ones = tcg_constant_vec_matching(d, vece, 1); in gen_urshr_vec() local
516 tcg_gen_and_vec(vece, t, t, ones); in gen_urshr_vec()
/qemu/docs/system/riscv/
H A Dsifive_u.rst33 that the RISC-V cores are replaced by the 32-bit ones (E31 and U34), to help
/qemu/target/ppc/
H A Dint_helper.c647 uint32_t ones = (uint32_t)-1; \
648 uint32_t all = ones; \
660 result = ones; \
/qemu/docs/interop/
H A Dqmp-spec.rst148 Only a few commands support out-of-band execution. The ones that do

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