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Searched refs:nvp (Results 1 – 7 of 7) sorted by relevance

/qemu/tests/qtest/
H A Dpnv-xive2-common.c86 void get_nvp(QTestState *qts, uint32_t index, Xive2Nvp* nvp) in get_nvp() argument
89 xive_get_struct(qts, addr, nvp, sizeof(Xive2Nvp)); in get_nvp()
95 Xive2Nvp nvp; in set_nvp() local
101 memset(&nvp, 0, sizeof(nvp)); in set_nvp()
102 nvp.w0 = xive_set_field32(NVP2_W0_VALID, 0, 1); in set_nvp()
103 nvp.w0 = xive_set_field32(NVP2_W0_PGOFIRST, nvp.w0, first); in set_nvp()
104 nvp.w6 = xive_set_field32(NVP2_W6_REPORTING_LINE, nvp.w6, in set_nvp()
106 nvp.w7 = xive_set_field32(NVP2_W7_REPORTING_LINE, nvp.w7, in set_nvp()
108 xive_copy_struct(qts, &nvp, nvp_addr, sizeof(nvp)); in set_nvp()
111 static uint64_t get_cl_pair_addr(Xive2Nvp *nvp) in get_cl_pair_addr() argument
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H A Dpnv-xive2-common.h98 extern void get_nvp(QTestState *qts, uint32_t index, Xive2Nvp* nvp);
100 extern void get_cl_pair(QTestState *qts, Xive2Nvp *nvp, uint8_t *cl_pair);
101 extern void set_cl_pair(QTestState *qts, Xive2Nvp *nvp, uint8_t *cl_pair);
H A Dpnv-xive2-test.c348 Xive2Nvp nvp; in test_pull_thread_ctx_to_odd_thread_cl() local
361 get_nvp(qts, target_nvp, &nvp); in test_pull_thread_ctx_to_odd_thread_cl()
362 set_cl_pair(qts, &nvp, cl_pair); in test_pull_thread_ctx_to_odd_thread_cl()
375 get_cl_pair(qts, &nvp, cl_pair); in test_pull_thread_ctx_to_odd_thread_cl()
/qemu/hw/intc/
H A Dxive2.c36 static uint64_t xive2_nvp_reporting_addr(Xive2Nvp *nvp) in xive2_nvp_reporting_addr() argument
40 cache_addr = xive_get_field32(NVP2_W6_REPORTING_LINE, nvp->w6) << 24 | in xive2_nvp_reporting_addr()
41 xive_get_field32(NVP2_W7_REPORTING_LINE, nvp->w7); in xive2_nvp_reporting_addr()
144 Xive2Nvp nvp; in xive2_presenter_nvp_backlog_op() local
147 if (xive2_router_get_nvp(xrtr, blk, idx, &nvp)) { in xive2_presenter_nvp_backlog_op()
151 if (!xive2_nvp_is_valid(&nvp)) { in xive2_presenter_nvp_backlog_op()
156 old_ipb = xive_get_field32(NVP2_W2_IPB, nvp.w2); in xive2_presenter_nvp_backlog_op()
170 nvp.w2 = xive_set_field32(NVP2_W2_IPB, nvp.w2, ipb); in xive2_presenter_nvp_backlog_op()
171 xive2_router_write_nvp(xrtr, blk, idx, &nvp, 2); in xive2_presenter_nvp_backlog_op()
292 void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx, GString *buf) in xive2_nvp_pic_print_info() argument
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H A Dpnv_xive2.c480 Xive2Nvp *nvp) in pnv_xive2_get_nvp() argument
482 return pnv_xive2_vst_read(PNV_XIVE2(xrtr), VST_NVP, blk, idx, nvp); in pnv_xive2_get_nvp()
486 Xive2Nvp *nvp, uint8_t word_number) in pnv_xive2_write_nvp() argument
488 return pnv_xive2_vst_write(PNV_XIVE2(xrtr), VST_NVP, blk, idx, nvp, in pnv_xive2_write_nvp()
2623 Xive2Nvp nvp; in pnv_xive2_pic_print_info() local
2660 while (!xive2_router_get_nvp(xrtr, blk, i, &nvp)) { in pnv_xive2_pic_print_info()
2661 xive2_nvp_pic_print_info(&nvp, i++, buf); in pnv_xive2_pic_print_info()
/qemu/include/hw/ppc/
H A Dxive2_regs.h186 #define xive2_nvp_is_valid(nvp) (be32_to_cpu((nvp)->w0) & NVP2_W0_VALID) argument
187 #define xive2_nvp_is_hw(nvp) (be32_to_cpu((nvp)->w0) & NVP2_W0_HW) argument
188 #define xive2_nvp_is_co(nvp) (be32_to_cpu((nvp)->w1) & NVP2_W1_CO) argument
213 void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx, GString *buf);
H A Dxive2.h51 Xive2Nvp *nvp);
53 Xive2Nvp *nvp, uint8_t word_number);
71 Xive2Nvp *nvp);
73 Xive2Nvp *nvp, uint8_t word_number);