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Searched refs:nsr (Results 1 – 4 of 4) sorted by relevance

/qemu/tests/qtest/
H A Dpnv-xive2-test.c222 uint8_t pq, nsr, cppr; in test_hw_irq() local
240 nsr = reg32 >> 24; in test_hw_irq()
242 g_assert_cmphex(nsr, ==, 0x80); in test_hw_irq()
247 nsr = reg16 >> 8; in test_hw_irq()
249 g_assert_cmphex(nsr, ==, 0x80); in test_hw_irq()
264 nsr = reg32 >> 24; in test_hw_irq()
266 g_assert_cmphex(nsr, ==, 0x00); in test_hw_irq()
280 uint8_t pq, nsr, cppr, ipb; in test_pool_irq() local
299 nsr = reg32 >> 24; in test_pool_irq()
301 g_assert_cmphex(nsr, ==, 0x40); in test_pool_irq()
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/qemu/target/arm/tcg/
H A Dm_helper.c2784 bool r, rw, nsr, nsrw, mrvalid; in HELPER() local
2843 nsr = sattrs.ns && r; in HELPER()
2847 nsr = false; in HELPER()
2855 (nsr << 20) | in HELPER()
/qemu/hw/intc/
H A Dxive.c47 uint8_t nsr = regs[TM_NSR]; in xive_tctx_accept() local
57 if ((ring == TM_QW3_HV_PHYS) && (nsr & (TM_QW3_NSR_HE_POOL << 6))) { in xive_tctx_accept()
84 return ((uint64_t)nsr << 8) | regs[TM_CPPR]; in xive_tctx_accept()
H A Dtrace-events277 xive_tctx_accept(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr…
278 xive_tctx_notify(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr…
279 …32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) "target=%d ring=0x…