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Searched refs:new_value (Results 1 – 21 of 21) sorted by relevance

/qemu/hw/misc/
H A Dstm32_rcc.c61 uint32_t prev_value, new_value, irq_offset; in stm32_rcc_write() local
78 new_value = extract32(value, i, 1); in stm32_rcc_write()
79 if (extract32(prev_value, i, 1) && !new_value) { in stm32_rcc_write()
80 trace_stm32_rcc_pulse_reset(irq_offset + i, new_value); in stm32_rcc_write()
81 qemu_set_irq(s->reset_irq[irq_offset + i], new_value); in stm32_rcc_write()
91 new_value = extract32(value, i, 1); in stm32_rcc_write()
92 if (!extract32(prev_value, i, 1) && new_value) { in stm32_rcc_write()
93 trace_stm32_rcc_pulse_enable(irq_offset + i, new_value); in stm32_rcc_write()
94 qemu_set_irq(s->enable_irq[irq_offset + i], new_value); in stm32_rcc_write()
H A Dimx7_snvs.c83 uint64_t new_value = 0, snvs_count = 0; in imx7_snvs_write() local
91 new_value = deposit64(snvs_count, 32, 32, v); in imx7_snvs_write()
94 new_value = deposit64(snvs_count, 0, 32, v); in imx7_snvs_write()
109 s->tick_offset += new_value - snvs_count; in imx7_snvs_write()
H A Dtrace-events156 npcm7xx_pwm_update_freq(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s …
157 npcm7xx_pwm_update_duty(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s …
/qemu/stubs/
H A Diothread-lock.c28 uint32_t new_value; in bql_block_unlock() local
33 new_value = bql_unlock_blocked + increase - !increase; in bql_block_unlock()
34 assert((new_value > bql_unlock_blocked) == increase); in bql_block_unlock()
35 bql_unlock_blocked = new_value; in bql_block_unlock()
/qemu/hw/riscv/
H A Driscv-iommu-hpm.c317 uint32_t new_value = 1 << ctr_idx; in update_event_map() local
327 new_value = GPOINTER_TO_UINT(data) & ~(new_value); in update_event_map()
328 if (new_value != 0) { in update_event_map()
331 GUINT_TO_POINTER(new_value)); in update_event_map()
345 new_value |= GPOINTER_TO_UINT(data); in update_event_map()
350 GUINT_TO_POINTER(new_value)); in update_event_map()
/qemu/hw/gpio/
H A Dpca9554.c49 uint8_t new_value; in pca9554_update_pin_input() local
71 new_value = s->regs[PCA9554_INPUT] & bit_mask; in pca9554_update_pin_input()
72 if (new_value != old_value) { in pca9554_update_pin_input()
73 if (new_value) { in pca9554_update_pin_input()
H A Dpca9552.c118 uint8_t new_value; in pca955x_update_pin_input() local
145 new_value = s->regs[input_reg] & bit_mask; in pca955x_update_pin_input()
146 if (new_value != old_value) { in pca955x_update_pin_input()
147 qemu_set_irq(s->gpio_out[i], !!new_value); in pca955x_update_pin_input()
H A Daspeed_gpio.c405 uint32_t new_value = 0; in update_value_control_source() local
413 new_value |= (0xff << i) & value; in update_value_control_source()
415 new_value |= (0xff << i) & old_value; in update_value_control_source()
418 return new_value; in update_value_control_source()
/qemu/target/riscv/
H A Dcpu.h844 target_ulong *ret_value, target_ulong new_value,
848 target_ulong new_value,
869 target_ulong new_value,
873 target_ulong new_value,
879 Int128 *ret_value, Int128 new_value,
885 Int128 new_value);
963 target_ulong riscv_new_csr_seed(target_ulong new_value,
H A Dcsr.c4793 target_ulong new_value, target_ulong write_mask) in rmw_hip() argument
4795 int ret = rmw_mip(env, csrno, ret_value, new_value, in rmw_hip()
5417 target_ulong riscv_new_csr_seed(target_ulong new_value, in riscv_new_csr_seed() argument
5447 target_ulong new_value, in rmw_seed() argument
5452 rval = riscv_new_csr_seed(new_value, write_mask); in rmw_seed()
5535 target_ulong new_value, in riscv_csrrw_do64() argument
5544 return csr_ops[csrno].op(env, csrno, ret_value, new_value, write_mask); in riscv_csrrw_do64()
5565 new_value = (old_value & ~write_mask) | (new_value & write_mask); in riscv_csrrw_do64()
5567 ret = csr_ops[csrno].write(env, csrno, new_value, ra); in riscv_csrrw_do64()
5594 target_ulong *ret_value, target_ulong new_value, in riscv_csrrw() argument
[all …]
/qemu/tests/qtest/
H A Dpnv-host-i2c-test.c171 uint8_t new_value = ((high) ? 1 : 0) << pin; in pnv_i2c_pca9554_set_pin() local
179 send_buf[1] = (recv_buf[0] & ~mask) | new_value; in pnv_i2c_pca9554_set_pin()
278 uint8_t new_value = ((high) ? 1 : 0) << shift; in pnv_i2c_pca9552_set_pin() local
286 send_buf[1] = (recv_buf[0] & mask) | new_value; in pnv_i2c_pca9552_set_pin()
/qemu/system/
H A Dcpus.c526 uint32_t new_value; in bql_block_unlock() local
531 new_value = bql_unlock_blocked + increase - !increase; in bql_block_unlock()
532 assert((new_value > bql_unlock_blocked) == increase); in bql_block_unlock()
533 bql_unlock_blocked = new_value; in bql_block_unlock()
/qemu/hw/nvram/
H A Dnpcm7xx_otp.c154 static uint32_t npcm7xx_otp_compute_fcfg(uint32_t cur_value, uint32_t new_value) in npcm7xx_otp_compute_fcfg() argument
170 value |= new_value & ~lock_mask; in npcm7xx_otp_compute_fcfg()
/qemu/target/hexagon/
H A Dtranslate.h74 TCGv new_value[TOTAL_PER_THREAD_REGS]; member
H A Dgenptr.c78 if (ctx->new_value[rnum] == NULL) { in get_result_gpr()
79 ctx->new_value[rnum] = tcg_temp_new(); in get_result_gpr()
80 tcg_gen_movi_tl(ctx->new_value[rnum], 0); in get_result_gpr()
82 return ctx->new_value[rnum]; in get_result_gpr()
H A DREADME270 new_value new value of a given register
H A Dtranslate.c430 ctx->new_value[i] = NULL; in gen_start_packet()
/qemu/hw/i2c/
H A Dnpcm7xx_smbus.c541 uint8_t new_value = s->cst; in npcm7xx_smbus_write_cst() local
543 s->cst = WRITE_ONE_CLEAR(new_value, value, NPCM7XX_SMBCST_BB); in npcm7xx_smbus_write_cst()
/qemu/target/riscv/kvm/
H A Dkvm-cpu.c1658 target_ulong new_value = run->riscv_csr.new_value; in kvm_riscv_handle_csr() local
1664 run->riscv_csr.ret_value = riscv_new_csr_seed(new_value, write_mask); in kvm_riscv_handle_csr()
/qemu/hw/net/
H A Dpcnet.c671 static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value);
1337 static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value) in pcnet_csr_writew() argument
1339 uint16_t val = new_value; in pcnet_csr_writew()
/qemu/linux-headers/linux/
H A Dkvm.h426 unsigned long new_value; member