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Searched refs:msg_id (Results 1 – 25 of 133) sorted by relevance

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/linux/include/trace/events/
H A Dscmi.h13 TP_PROTO(u8 protocol_id, u8 msg_id, u32 res_id, u32 val1, u32 val2),
14 TP_ARGS(protocol_id, msg_id, res_id, val1, val2),
18 __field(u8, msg_id)
26 __entry->msg_id = msg_id;
32 TP_printk("pt=%02X msg_id=%02X res_id:%u vals=%u:%u",
33 __entry->protocol_id, __entry->msg_id,
38 TP_PROTO(int transfer_id, u8 msg_id, u8 protocol_id, u16 seq,
40 TP_ARGS(transfer_id, msg_id, protocol_id, seq, poll, inflight),
44 __field(u8, msg_id)
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H A Dcachefiles.h698 __field(unsigned int, msg_id)
706 __entry->msg_id = msg->msg_id;
714 __entry->msg_id,
721 TP_PROTO(struct cachefiles_object *obj, unsigned int msg_id,
724 TP_ARGS(obj, msg_id, len),
728 __field(unsigned int, msg_id)
734 __entry->msg_id = msg_id;
740 __entry->msg_id,
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H A Damdxdna.h56 TP_PROTO(char *name, u8 chann_id, u32 opcode, u32 msg_id),
58 TP_ARGS(name, chann_id, opcode, msg_id),
63 __field(u32, msg_id)),
68 __entry->msg_id = msg_id;),
71 __entry->chann_id, __entry->msg_id, __entry->opcode)
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_clockpowergating.c170 const uint32_t *msg_id) in smu7_update_clock_gatings() argument
178 switch ((*msg_id & PP_GROUP_MASK) >> PP_GROUP_SHIFT) { in smu7_update_clock_gatings()
180 switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) { in smu7_update_clock_gatings()
182 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
183 msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? in smu7_update_clock_gatings()
192 if (PP_STATE_SUPPORT_LS & *msg_id) { in smu7_update_clock_gatings()
193 msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS in smu7_update_clock_gatings()
205 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
206 msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? in smu7_update_clock_gatings()
216 if (PP_STATE_SUPPORT_LS & *msg_id) { in smu7_update_clock_gatings()
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/linux/drivers/platform/x86/amd/hsmp/
H A Dhsmp.c84 ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_id_off, &msg->msg_id, HSMP_WR); in __hsmp_send_message()
86 dev_err(sock->dev, "Error %d writing message ID %u\n", ret, msg->msg_id); in __hsmp_send_message()
121 msg->msg_id, mbox_status); in __hsmp_send_message()
125 msg->msg_id, mbox_status); in __hsmp_send_message()
129 msg->msg_id, mbox_status); in __hsmp_send_message()
133 msg->msg_id, mbox_status); in __hsmp_send_message()
137 msg->msg_id, mbox_status); in __hsmp_send_message()
141 msg->msg_id, mbox_status); in __hsmp_send_message()
158 ret, index, msg->msg_id); in __hsmp_send_message()
169 /* msg_id agains in validate_message()
229 hsmp_msg_get_nargs(u16 sock_ind,u32 msg_id,u32 * data,u8 num_args) hsmp_msg_get_nargs() argument
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H A Dhwmon.c36 msg.msg_id = HSMP_SET_SOCKET_POWER_LIMIT; in hsmp_hwmon_write()
57 msg.msg_id = HSMP_GET_SOCKET_POWER; in hsmp_hwmon_read()
60 msg.msg_id = HSMP_GET_SOCKET_POWER_LIMIT; in hsmp_hwmon_read()
63 msg.msg_id = HSMP_GET_SOCKET_POWER_LIMIT_MAX; in hsmp_hwmon_read()
H A Dacpi.c44 u32 msg_id; member
270 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, &data, 1); in hsmp_msg_resp32_show()
296 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, &data, 1); in hsmp_ddr_max_bw_show()
311 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, &data, 1); in hsmp_ddr_util_bw_show()
326 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, &data, 1); in hsmp_ddr_util_bw_perc_show()
341 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, &data, 1); in hsmp_msg_fw_ver_show()
359 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, data, 2); in hsmp_fclk_show()
374 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, data, 2); in hsmp_mclk_show()
389 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, &data, 1); in hsmp_clk_fmax_show()
404 ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, in hsmp_clk_fmin_show()
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/linux/drivers/media/platform/mediatek/vcodec/encoder/
H A Dvenc_ipi_msg.h35 * @msg_id: message id (AP_IPIMSG_XXX_ENC_INIT)
43 uint32_t msg_id; member
50 * @msg_id: message id (AP_IPIMSG_XXX_ENC_SET_PARAM)
58 uint32_t msg_id; member
72 * @msg_id: message id (AP_IPIMSG_XXX_ENC_ENCODE)
82 uint32_t msg_id; member
105 * @msg_id: message id (AP_IPIMSG_XXX_ENC_ENCODE)
116 u32 msg_id; member
129 * @msg_id: message id (AP_IPIMSG_XXX_ENC_DEINIT)
134 uint32_t msg_id; member
153 uint32_t msg_id; global() member
171 uint32_t msg_id; global() member
188 uint32_t msg_id; global() member
223 uint32_t msg_id; global() member
239 uint32_t msg_id; global() member
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H A Dvenc_vpu_if.c75 mtk_venc_debug(vpu->ctx, "msg_id %x inst %p status %d", msg->msg_id, vpu, msg->status); in vpu_enc_ipi_handler()
76 if (!vpu_enc_check_ap_inst(enc_dev, vpu) || msg->msg_id < VPU_IPIMSG_ENC_INIT_DONE || in vpu_enc_ipi_handler()
77 msg->msg_id > VPU_IPIMSG_ENC_DEINIT_DONE) { in vpu_enc_ipi_handler()
78 mtk_v4l2_venc_err(vpu->ctx, "venc msg id not correctly => 0x%x", msg->msg_id); in vpu_enc_ipi_handler()
89 switch (msg->msg_id) { in vpu_enc_ipi_handler()
101 mtk_venc_err(vpu->ctx, "unknown msg id %x", msg->msg_id); in vpu_enc_ipi_handler()
122 mtk_venc_err(vpu->ctx, "vpu_ipi_send msg_id %x len %d fail %d", in vpu_enc_send_msg()
152 out.msg_id = AP_IPIMSG_ENC_INIT; in vpu_enc_init()
199 out.base.msg_id in vpu_enc_set_param()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c120 unsigned int msg_id, in dcn314_smu_send_msg_with_param() argument
141 REG_WRITE(MP1_SMN_C2PMSG_67, msg_id); in dcn314_smu_send_msg_with_param()
146 if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu && in dcn314_smu_send_msg_with_param()
149 else if (msg_id == VBIOSSMC_MSG_SetHardMinDcfclkByFreq || in dcn314_smu_send_msg_with_param()
150 msg_id == VBIOSSMC_MSG_SetMinDeepSleepDcfclk) in dcn314_smu_send_msg_with_param()
160 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in dcn314_smu_send_msg_with_param()
341 unsigned int msg_id, param; in dcn314_smu_set_zstate_support() local
349 msg_id = VBIOSSMC_MSG_AllowZstatesEntry; in dcn314_smu_set_zstate_support()
354 msg_id = VBIOSSMC_MSG_AllowZstatesEntry; in dcn314_smu_set_zstate_support()
360 msg_id in dcn314_smu_set_zstate_support()
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/linux/include/drm/display/
H A Ddrm_hdcp.h152 u8 msg_id; member
158 u8 msg_id; member
165 u8 msg_id; member
170 u8 msg_id; member
175 u8 msg_id; member
180 u8 msg_id; member
185 u8 msg_id; member
190 u8 msg_id; member
195 u8 msg_id; member
201 u8 msg_id; member
209 u8 msg_id; global() member
214 u8 msg_id; global() member
221 u8 msg_id; global() member
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/linux/drivers/media/platform/mediatek/vcodec/decoder/
H A Dvdec_ipi_msg.h37 * @msg_id : vdec_ipi_msgid
44 uint32_t msg_id; member
55 * @msg_id : vdec_ipi_msgid
60 uint32_t msg_id; member
67 * @msg_id : AP_IPIMSG_DEC_INIT
72 uint32_t msg_id; member
79 * @msg_id : AP_IPIMSG_DEC_START
89 uint32_t msg_id; member
100 * @msg_id : VPU_IPIMSG_DEC_INIT_ACK
111 uint32_t msg_id; member
128 u32 msg_id; global() member
145 u32 msg_id; global() member
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/linux/drivers/accel/amdxdna/
H A Damdxdna_mailbox.c163 static inline int mailbox_validate_msgid(int msg_id) in mailbox_validate_msgid() argument
165 return (msg_id & MAGIC_VAL_MASK) == MAGIC_VAL; in mailbox_validate_msgid()
170 u32 msg_id; in mailbox_acquire_msgid() local
173 ret = xa_alloc_cyclic_irq(&mb_chann->chan_xa, &msg_id, mb_msg, in mailbox_acquire_msgid()
182 msg_id |= MAGIC_VAL; in mailbox_acquire_msgid()
183 return msg_id; in mailbox_acquire_msgid()
186 static void mailbox_release_msgid(struct mailbox_channel *mb_chann, int msg_id) in mailbox_release_msgid() argument
188 msg_id &= ~MAGIC_VAL_MASK; in mailbox_release_msgid()
189 xa_erase_irq(&mb_chann->chan_xa, msg_id); in mailbox_release_msgid()
195 MB_DBG(mb_chann, "msg_id in mailbox_release_msg()
250 int msg_id; mailbox_get_resp() local
530 unsigned long msg_id; xdna_mailbox_destroy_channel() local
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/linux/drivers/gpu/drm/amd/display/dc/hdcp/
H A Dhdcp_msg.c138 if (message_info->msg_id == HDCP_MESSAGE_ID_INVALID) { in hdmi_14_process_transaction()
139 DC_LOG_ERROR("%s: Invalid message_info msg_id - %d\n", __func__, message_info->msg_id); in hdmi_14_process_transaction()
143 offset = hdcp_i2c_offsets[message_info->msg_id]; in hdmi_14_process_transaction()
158 if (hdcp_cmd_is_read[message_info->msg_id]) { in hdmi_14_process_transaction()
319 if (message_info->msg_id == HDCP_MESSAGE_ID_INVALID) { in dp_11_process_transaction()
320 DC_LOG_ERROR("%s: Invalid message_info msg_id - %d\n", __func__, message_info->msg_id); in dp_11_process_transaction()
328 hdcp_dpcd_addrs[message_info->msg_id], in dp_11_process_transaction()
329 hdcp_cmd_is_read[message_info->msg_id]); in dp_11_process_transaction()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.c104 unsigned int msg_id, in dcn31_smu_send_msg_with_param() argument
125 REG_WRITE(MP1_SMN_C2PMSG_67, msg_id); in dcn31_smu_send_msg_with_param()
130 if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu && in dcn31_smu_send_msg_with_param()
141 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in dcn31_smu_send_msg_with_param()
322 unsigned int msg_id, param; in dcn31_smu_set_zstate_support() local
338 msg_id = VBIOSSMC_MSG_DisallowZstatesEntry; in dcn31_smu_set_zstate_support()
340 msg_id = VBIOSSMC_MSG_AllowZstatesEntry; in dcn31_smu_set_zstate_support()
344 msg_id, in dcn31_smu_set_zstate_support()
/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_hw_mgmt.c122 * @msg_id: message id
130 u16 cmd, u16 msg_id) in prepare_header() argument
145 HINIC_MSG_HEADER_SET(msg_id, MSG_ID); in prepare_header()
209 u16 msg_id; in send_msg_to_mgmt() local
211 msg_id = SYNC_MSG_ID(pf_to_mgmt); in send_msg_to_mgmt()
219 direction, cmd, msg_id); in send_msg_to_mgmt()
257 u16 msg_id; in msg_to_mgmt_sync() local
267 msg_id = SYNC_MSG_ID(pf_to_mgmt); in msg_to_mgmt_sync()
269 msg_id = resp_msg_id; in msg_to_mgmt_sync()
283 dev_err(&pdev->dev, "MGMT timeout, MSG id = %d\n", msg_id); in msg_to_mgmt_sync()
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/linux/sound/soc/intel/atom/sst/
H A Dsst_ipc.c29 u32 msg_id, u32 drv_id) in sst_create_block() argument
39 msg->msg_id = msg_id; in sst_create_block()
72 dev_dbg(ctx->dev, "Block ipc %d, drv_id %d\n", block->msg_id, in sst_wake_up_block()
74 if (block->msg_id == ipc && block->drv_id == drv_id) { in sst_wake_up_block()
251 u32 msg_id; in process_fw_async_msg() local
259 msg_id = ((struct ipc_dsp_hdr *)msg->mailbox_data)->cmd_id; in process_fw_async_msg()
263 switch (msg_id) { in process_fw_async_msg()
314 "Unrecognized async msg from FW msg_id %#x\n", msg_id); in process_fw_async_msg()
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_hdcp.c292 u8 msg_id; member
297 u8 msg_id; member
365 u8 msg_id, bool *msg_ready) in hdcp2_detect_msg_availability() argument
375 switch (msg_id) { in hdcp2_detect_msg_availability()
390 "Unidentified msg_id: %d\n", msg_id); in hdcp2_detect_msg_availability()
405 u8 msg_id = hdcp2_msg_data->msg_id; in intel_dp_hdcp2_wait_for_msg() local
409 if (msg_id == HDCP_2_2_AKE_SEND_HPRIME && !hdcp->is_paired) in intel_dp_hdcp2_wait_for_msg()
427 ret = hdcp2_detect_msg_availability(connector, msg_id, in intel_dp_hdcp2_wait_for_msg()
441 get_hdcp2_dp_msg_data(u8 msg_id) get_hdcp2_dp_msg_data() argument
516 intel_dp_hdcp2_read_msg(struct intel_connector * connector,u8 msg_id,void * buf,size_t size) intel_dp_hdcp2_read_msg() argument
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/linux/drivers/net/can/esd/
H A Desdacc.h130 u8 msg_id; member
148 u8 msg_id; member
159 u8 msg_id; member
170 u8 msg_id; member
183 u8 msg_id; member
194 u8 msg_id; member
204 u8 msg_id; member
212 u8 msg_id; member
218 u8 msg_id; member
/linux/include/linux/soc/qcom/
H A Dqmi.h22 * @msg_id: message id
28 __le16 msg_id; member
183 * @msg_id: message id
190 unsigned int msg_id; member
251 struct qmi_txn *txn, int msg_id, size_t len,
254 struct qmi_txn *txn, int msg_id, size_t len,
257 int msg_id, size_t len, const struct qmi_elem_info *ei,
260 void *qmi_encode_message(int type, unsigned int msg_id, size_t *len,
/linux/drivers/infiniband/ulp/rtrs/
H A Drtrs-srv-trace.h43 __field(u32, msg_id)
61 __entry->msg_id = id->msg_id;
76 __entry->msg_id,
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr_smu_msg.c71 static bool dcn32_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32_t param_in, uint32_t *param_out) in dcn32_smu_send_msg_with_param() argument
83 REG_WRITE(DAL_MSG_REG, msg_id); in dcn32_smu_send_msg_with_param()
85 TRACE_SMU_MSG(msg_id, param_in, clk_mgr->base.ctx); in dcn32_smu_send_msg_with_param()
128 static bool dcn32_smu_send_msg_with_param_delay(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32_t param_in, uint32_t *param_out, unsigned int *total_delay_us) in dcn32_smu_send_msg_with_param_delay() argument
143 REG_WRITE(DAL_MSG_REG, msg_id); in dcn32_smu_send_msg_with_param_delay()
145 TRACE_SMU_MSG(msg_id, param_in, clk_mgr->base.ctx); in dcn32_smu_send_msg_with_param_delay()
/linux/drivers/gpu/drm/amd/display/modules/hdcp/
H A Dhdcp_ddc.c153 enum mod_hdcp_ddc_message_id msg_id, in read() argument
161 if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID || in read()
162 msg_id >= MOD_HDCP_MESSAGE_ID_MAX) in read()
167 if (msg_id >= num_dpcd_addrs) in read()
173 hdcp_dpcd_addrs[msg_id] + data_offset, in read()
185 if (msg_id >= num_i2c_offsets) in read()
191 hdcp_i2c_offsets[msg_id], in read()
200 enum mod_hdcp_ddc_message_id msg_id, in read_repeatedly() argument
211 status = read(hdcp, msg_id, buf + data_offset, cur_size); in read_repeatedly()
224 enum mod_hdcp_ddc_message_id msg_id, in write() argument
[all...]
/linux/drivers/media/platform/mediatek/mdp/
H A Dmtk_mdp_ipi.h27 * @msg_id : AP_MDP_INIT
32 uint32_t msg_id; member
39 * @msg_id : AP_MDP_PROCESS, AP_MDP_DEINIT
46 uint32_t msg_id; member
55 * @msg_id : VPU_MDP_DEINIT_ACK, VPU_MDP_PROCESS_ACK
62 uint32_t msg_id; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30m_clk_mgr_smu_msg.c77 uint32_t msg_id, uint32_t param_in, uint32_t *param_out) in dcn30m_smu_send_msg_with_param() argument
90 REG_WRITE(DAL_MSG_REG, msg_id); in dcn30m_smu_send_msg_with_param()
95 dm_helpers_smu_timeout(CTX, msg_id, param_in, 10 * 200000); in dcn30m_smu_send_msg_with_param()

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